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author | Furquan Shaikh <furquan@google.com> | 2020-09-21 22:44:27 +0000 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2020-09-22 05:13:39 +0000 |
commit | b13bd1efcf568bb220500ca94e4de097f3bed9ec (patch) | |
tree | 498a45a955bbd97da0995a966e9356ae6236ce94 /src/soc/intel/cannonlake | |
parent | 5bd4adf542abea433c98c72f7423762109412d4d (diff) | |
download | coreboot-b13bd1efcf568bb220500ca94e4de097f3bed9ec.tar.xz |
Revert "soc/intel: Refactor do_global_reset() function"
This reverts commit 77cc3267fc970c710299a164ecbc471f9287d719.
Reason for revert: Breaks quark and also needs breaking down into multiple CLs as commented by Nico on CB:45541
Change-Id: Idf4ca74158df15483856754ee24cc4472a8e09b0
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44997
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r-- | src/soc/intel/cannonlake/reset.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c index ecc052e6eb..1f7ea3c180 100644 --- a/src/soc/intel/cannonlake/reset.c +++ b/src/soc/intel/cannonlake/reset.c @@ -1,8 +1,23 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <cf9_reset.h> #include <console/console.h> +#include <intelblocks/cse.h> +#include <intelblocks/pmclib.h> #include <fsp/util.h> #include <soc/intel/common/reset.h> +#include <soc/pci_devs.h> + +void do_global_reset(void) +{ + /* Ask CSE to do the global reset */ + if (cse_request_global_reset()) + return; + + /* global reset if CSE fail to reset */ + pmc_global_reset_enable(1); + do_full_reset(); +} void chipset_handle_reset(uint32_t status) { |