diff options
author | Lijian Zhao <lijian.zhao@intel.com> | 2018-08-31 10:16:41 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-06 10:30:04 +0000 |
commit | 013ebbfa58e82fb420226adb4da6ce90c285b00d (patch) | |
tree | 781674cafb78da07e5216641c0a94dddfd1bb86f /src/soc/intel/cannonlake | |
parent | 79b990d96535f394fc97c796230f1d572e5a2732 (diff) | |
download | coreboot-013ebbfa58e82fb420226adb4da6ce90c285b00d.tar.xz |
soc/intel/cannonlake: Fix Coverity Scan report
Fix uninitialized variable OnModuleSpd, init bool with false first.
BUG=CID 1395330, 1395331
TEST=N/A
Change-Id: I050287370f7321ff9905937304bb3cc7f20d8c6a
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/28409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r-- | src/soc/intel/cannonlake/cnl_memcfg_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/cnl_memcfg_init.c b/src/soc/intel/cannonlake/cnl_memcfg_init.c index 9f9592b5db..4425862c32 100644 --- a/src/soc/intel/cannonlake/cnl_memcfg_init.c +++ b/src/soc/intel/cannonlake/cnl_memcfg_init.c @@ -98,7 +98,7 @@ void cannonlake_memcfg_init(FSP_M_CONFIG *mem_cfg, const struct cnl_mb_cfg *cnl_cfg, const struct spd_info *spd) { - bool OnModuleSpd; + bool OnModuleSpd = false; /* Early Command Training Enabled */ mem_cfg->ECT = cnl_cfg->ect; mem_cfg->DqPinsInterleaved = cnl_cfg->dq_pins_interleaved; @@ -109,7 +109,7 @@ void cannonlake_memcfg_init(FSP_M_CONFIG *mem_cfg, for (int i = 0; i < ARRAY_SIZE(mem_cfg->SpdAddressTable); i++) { if (spd->spd_smbus_address[i] != 0) { mem_cfg->SpdAddressTable[i] = spd->spd_smbus_address[i]; - OnModuleSpd = 1; + OnModuleSpd = true; } } |