diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-10-19 16:40:14 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-10-19 17:36:16 +0000 |
| commit | ed1694157c4f14d4ce60e7c053ea044aca6777fb (patch) | |
| tree | 36dd2a267e92bc62cc56bf656f151963c7df778d /src/soc/intel/cannonlake | |
| parent | f506cf0b8dd3914826d55bf7e120f5ed826e438b (diff) | |
| download | coreboot-ed1694157c4f14d4ce60e7c053ea044aca6777fb.tar.xz | |
soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size
Avoid calling calculate_dram_base() function to get chipset reserved
memory size during pci resource allocation. Rather use EBDA to store
chipset reserved memory size while calling cbmem_top_int().
This patch avoids one extra calculate_dram_base() call.
BRANCH=none
BUG=b:63974384
TEST=Ensures DRAM based resource allocation has taken care of Intel
SoC reserved ranges.
Change-Id: I2771ea55253ca7d16cd2e2951889ab092b47a9b1
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22099
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/ebda.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/memmap.c | 7 |
2 files changed, 5 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/ebda.h b/src/soc/intel/cannonlake/include/soc/ebda.h index 4cde5c0106..15a9d28a91 100644 --- a/src/soc/intel/cannonlake/include/soc/ebda.h +++ b/src/soc/intel/cannonlake/include/soc/ebda.h @@ -19,6 +19,7 @@ struct ebda_config { uint32_t signature; /* 0x00 - EBDA signature */ uint32_t tolum_base; /* 0x04 - coreboot memory start */ + uint32_t reserved_mem_size; /* 0x08 - chipset reserved memory size */ }; #endif diff --git a/src/soc/intel/cannonlake/memmap.c b/src/soc/intel/cannonlake/memmap.c index 8cf74c5585..0636b08abe 100644 --- a/src/soc/intel/cannonlake/memmap.c +++ b/src/soc/intel/cannonlake/memmap.c @@ -263,12 +263,12 @@ static uintptr_t calculate_dram_base(size_t *reserved_mem_size) */ size_t soc_reserved_mmio_size(void) { - size_t chipset_mem_size; + struct ebda_config cfg; - calculate_dram_base(&chipset_mem_size); + retrieve_ebda_object(&cfg); /* Get Intel Reserved Memory Range Size */ - return chipset_mem_size; + return cfg.reserved_mem_size; } /* Fill up memory layout information */ @@ -277,6 +277,7 @@ void fill_soc_memmap_ebda(struct ebda_config *cfg) size_t chipset_mem_size; cfg->tolum_base = calculate_dram_base(&chipset_mem_size); + cfg->reserved_mem_size = chipset_mem_size; } void cbmem_top_init(void) |