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| author | Patrick Georgi <pgeorgi@google.com> | 2017-10-06 17:36:09 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2017-10-09 07:10:54 +0000 |
| commit | 22579596ffa77889062d7655a366682cfeae84f7 (patch) | |
| tree | a0bf2f04bbd49f0f5d04102eb06f97b415a0ed86 /src/soc/intel/cannonlake | |
| parent | f2fc4972282bfa92be417bc6f3df3197c47ceb01 (diff) | |
| download | coreboot-22579596ffa77889062d7655a366682cfeae84f7.tar.xz | |
soc/intel/*lake: Load vbt when it's needed
That removes the need for another global variable.
Change-Id: I25e12ba724836de4c8afb25cd347cafe6df8cea9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/21907
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/chip.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index 57a32244ca..39e8e8ba33 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -25,8 +25,6 @@ #include <soc/ramstage.h> #include <string.h> -static void *vbt; - #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) static const char *soc_acpi_name(const struct device *dev) { @@ -180,11 +178,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Parse device tree and enable/disable devices */ parse_devicetree(params); - /* Save VBT info and mapping */ - vbt = vbt_get(); - /* Load VBT before devicetree-specific config. */ - params->GraphicsConfigPtr = (uintptr_t)vbt; + params->GraphicsConfigPtr = (uintptr_t)vbt_get(); /* Set USB OC pin to 0 first */ for (i = 0; i < ARRAY_SIZE(params->Usb2OverCurrentPin); i++) { |