summaryrefslogtreecommitdiff
path: root/src/soc/intel/cannonlake
diff options
context:
space:
mode:
authorChristian Walter <christian.walter@9elements.com>2019-08-13 15:09:10 +0200
committerPatrick Rudolph <siro@das-labor.org>2019-08-16 10:42:27 +0000
commitf4aa501ecacb3cbc3774d01b5f9209f71bd578cf (patch)
treea955e7290956fd7fb29edcdf29dbef3c6bb0a781 /src/soc/intel/cannonlake
parentccac15a4dd95a7c65388ce4a94ea56c58913e111 (diff)
downloadcoreboot-f4aa501ecacb3cbc3774d01b5f9209f71bd578cf.tar.xz
soc/intel/cannonlake: Add 4E/4F to early io init
This is needed for the AST2500 to work, because it uses 4E/4F. Change-Id: Ie47474e9bf1edfe98555a148469c41283e9a4ea6 Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34862 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/bootblock/pch.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c
index c43d6d8bd1..a3252c2560 100644
--- a/src/soc/intel/cannonlake/bootblock/pch.c
+++ b/src/soc/intel/cannonlake/bootblock/pch.c
@@ -159,7 +159,7 @@ static int pch_check_decode_enable(void)
void pch_early_iorange_init(void)
{
- uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
+ uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
LPC_IOE_EC_62_66 | LPC_IOE_LGE_200;
/* IO Decode Range */