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| author | Lijian Zhao <lijian.zhao@intel.com> | 2018-12-06 17:07:25 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-19 05:30:52 +0000 |
| commit | 6b2c9b17514d10f61106c50580ea6c0f33345e00 (patch) | |
| tree | 79550d82c046b2913d7f7ff5d45403a4c7d7d9a6 /src/soc/intel/cannonlake | |
| parent | ba8202948ab77bdbd3dc2197f1552b87791a659a (diff) | |
| download | coreboot-6b2c9b17514d10f61106c50580ea6c0f33345e00.tar.xz | |
mb/google/sarien: Use meaningful SATA mode
Define SATA mode to AHCI mode instead of 0, make devicetree more
readable.
BUG=N/A
Change-Id: I903545d9487c1409f9008407fe5bee6aa4959b98
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/30095
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
0 files changed, 0 insertions, 0 deletions