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authorSubrata Banik <subrata.banik@intel.com>2018-05-08 20:08:49 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-06-06 06:25:50 +0000
commit9ab6d92e96434d6d4975e0d11aae736feef0dfc1 (patch)
tree0db3b2748e3b7b9a0c6173d94ba40129f7d7a443 /src/soc/intel/cannonlake
parentc4986eb7f4eee0f305c6a6f05b45effae152062c (diff)
downloadcoreboot-9ab6d92e96434d6d4975e0d11aae736feef0dfc1.tar.xz
soc/intel/common/block: Move gspi common functions into block/gspi
This patch cleans soc/intel/{apollolake/cannonlake/skylake} by moving common soc code into common/block/gspi. BUG=b:78109109 BRANCH=none TEST=Build and boot KBL/CNL/APL platform. Change-Id: I877c7c48af928ca1e0399ec794d9400bc52edfcb Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com> Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/26048 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/gspi.c51
-rw-r--r--src/soc/intel/cannonlake/spi.c15
2 files changed, 9 insertions, 57 deletions
diff --git a/src/soc/intel/cannonlake/gspi.c b/src/soc/intel/cannonlake/gspi.c
index 4b00f3a0f8..c5998b50e2 100644
--- a/src/soc/intel/cannonlake/gspi.c
+++ b/src/soc/intel/cannonlake/gspi.c
@@ -14,51 +14,18 @@
* GNU General Public License for more details.
*/
-#include <assert.h>
-#include <device/device.h>
-#include <intelblocks/chip.h>
#include <intelblocks/gspi.h>
-#include <intelblocks/spi.h>
-#include <soc/iomap.h>
#include <soc/pci_devs.h>
-#include "chip.h"
-
-const struct gspi_cfg *gspi_get_soc_cfg(void)
-{
- const struct soc_intel_common_config *common_config;
- common_config = chip_get_common_soc_structure();
-
- return &common_config->gspi[0];
-}
-
-uintptr_t gspi_get_soc_early_base(void)
-{
- return EARLY_GSPI_BASE_ADDRESS;
-}
-
-/*
- * SPI Bus 0 is Fast SPI and GSPI starts from SPI bus # 1 onwards. Thus, adjust
- * the bus # accordingly when referring to SPI / GSPI bus numbers.
- */
-#define GSPI_TO_SPI_BUS(x) ((x) + 1)
-#define SPI_TO_GSPI_BUS(x) ((x) - 1)
-
-int gspi_soc_spi_to_gspi_bus(unsigned int spi_bus, unsigned int *gspi_bus)
-{
- if (spi_bus == 0)
- return -1;
-
- *gspi_bus = SPI_TO_GSPI_BUS(spi_bus);
- if (*gspi_bus >= CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX)
- return -1;
-
- return 0;
-}
int gspi_soc_bus_to_devfn(unsigned int gspi_bus)
{
- if (gspi_bus >= CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX)
- return -1;
-
- return spi_soc_bus_to_devfn(GSPI_TO_SPI_BUS(gspi_bus));
+ switch (gspi_bus) {
+ case 0:
+ return PCH_DEVFN_GSPI0;
+ case 1:
+ return PCH_DEVFN_GSPI1;
+ case 2:
+ return PCH_DEVFN_GSPI2;
+ }
+ return -1;
}
diff --git a/src/soc/intel/cannonlake/spi.c b/src/soc/intel/cannonlake/spi.c
index a601624a5e..4989cd49aa 100644
--- a/src/soc/intel/cannonlake/spi.c
+++ b/src/soc/intel/cannonlake/spi.c
@@ -32,18 +32,3 @@ int spi_soc_devfn_to_bus(unsigned int devfn)
}
return -1;
}
-
-int spi_soc_bus_to_devfn(unsigned int bus)
-{
- switch (bus) {
- case 0:
- return PCH_DEVFN_SPI;
- case 1:
- return PCH_DEVFN_GSPI0;
- case 2:
- return PCH_DEVFN_GSPI1;
- case 3:
- return PCH_DEVFN_GSPI2;
- }
- return -1;
-}