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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-06-17 13:32:13 +0200 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-06-26 09:20:12 +0000 |
| commit | c8db633852229462c2d7e89ef1ac6ab34b47e5a3 (patch) | |
| tree | 9b0ac518a14f402788c0b03d41f181afa7ef26ab /src/soc/intel/cannonlake | |
| parent | b4a1981289d785dc62be3cde9b87ba2a64946ec5 (diff) | |
| download | coreboot-c8db633852229462c2d7e89ef1ac6ab34b47e5a3.tar.xz | |
soc/intel/cannonlake/Kconfig: Don't have all variants select SOC_INTEL_CANNONLAKE
This allows to use Kconfig options to differentiate between SOC
variants.
Change-Id: Ica11c68377e3d0dc8a8f48198e01a74d7bebe642
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33559
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 27 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 2 |
2 files changed, 14 insertions, 15 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 7b4282c934..2279df2247 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -1,12 +1,9 @@ -config SOC_INTEL_CANNONLAKE +config SOC_INTEL_CANNONLAKE_BASE bool - help - Intel Cannonlake support config SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS bool - default n - select SOC_INTEL_CANNONLAKE + default y if SOC_INTEL_CANNONLAKE_BASE && !SOC_INTEL_CANNONLAKE help Single Kconfig option to select common base Cannonlake support. This Kconfig will help to select majority of CNL SoC features. @@ -16,34 +13,36 @@ config SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS required SoC support FSP headers. Any future Intel SoC would like to make use of CNL support might just select this Kconfig. +config SOC_INTEL_CANNONLAKE + bool + select SOC_INTEL_CANNONLAKE_BASE + help + Intel Cannonlake support + config SOC_INTEL_COFFEELAKE bool - default n - select SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS + select SOC_INTEL_CANNONLAKE_BASE help Intel Coffeelake support config SOC_INTEL_WHISKEYLAKE bool - default n - select SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS + select SOC_INTEL_CANNONLAKE_BASE help Intel Whiskeylake support config SOC_INTEL_COMETLAKE bool - default n - select SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS + select SOC_INTEL_CANNONLAKE_BASE help Intel Cometlake support config SOC_INTEL_CANNONLAKE_PCH_H bool - default n help Choose this option if you have a PCH-H chipset. -if SOC_INTEL_CANNONLAKE +if SOC_INTEL_CANNONLAKE_BASE config CPU_SPECIFIC_OPTIONS def_bool y @@ -297,7 +296,7 @@ config FSP_HEADER_PATH string "Location of FSP headers" default "3rdparty/fsp/CoffeeLakeFspBinPkg/Include/" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE default "src/vendorcode/intel/fsp/fsp2_0/cometlake/" if SOC_INTEL_COMETLAKE - default "src/vendorcode/intel/fsp/fsp2_0/cannonlake/" + default "src/vendorcode/intel/fsp/fsp2_0/cannonlake/" if SOC_INTEL_CANNONLAKE config FSP_FD_PATH string diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 13289448b6..5017410234 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -1,4 +1,4 @@ -ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE),y) +ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_BASE),y) subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode |