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author | Subrata Banik <subrata.banik@intel.com> | 2020-03-14 13:19:14 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-15 13:12:05 +0000 |
commit | 03abf8dbd16fa10a513c8d6dc831315b9cc73144 (patch) | |
tree | 381cfb62d14e57195ff3c98495052bebe0d5d99f /src/soc/intel/common/Kconfig | |
parent | 083e4ef1effd87b9cab70588186f389219e1037d (diff) | |
download | coreboot-03abf8dbd16fa10a513c8d6dc831315b9cc73144.tar.xz |
soc/intel/Kconfig: Avoid specifying dedicated chipset name
This patch ensures all IA chipsets and common Kconfig files
are getting included without specifying dedicated chipset names.
TEST=Able to compile CML and TGL RVP.
Change-Id: Ic2d8a8ac1c4acfabd4ded1bfd4ff359e820e174b
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39530
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/Kconfig')
-rw-r--r-- | src/soc/intel/common/Kconfig | 71 |
1 files changed, 0 insertions, 71 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig deleted file mode 100644 index 44c2392abc..0000000000 --- a/src/soc/intel/common/Kconfig +++ /dev/null @@ -1,71 +0,0 @@ -config SOC_INTEL_COMMON - bool - select HAVE_DISPLAY_MTRRS - help - common code for Intel SOCs - -if SOC_INTEL_COMMON - -comment "Intel SoC Common Code" -source "src/soc/intel/common/block/Kconfig" - -comment "Intel SoC Common PCH Code" -source "src/soc/intel/common/pch/Kconfig" - -comment "Intel SoC Common coreboot stages" -source "src/soc/intel/common/basecode/Kconfig" - -config SOC_INTEL_COMMON_RESET - bool - default n - select HAVE_CF9_RESET - -config SOC_INTEL_COMMON_ACPI_WAKE_SOURCE - bool - default n - -config ACPI_CONSOLE - bool - default n - help - Provide a mechanism for serial console based ACPI debug. - -config MMA - bool "Enable MMA (Memory Margin Analysis) support for Intel Core" - default n - depends on SOC_INTEL_KABYLAKE || SOC_INTEL_SKYLAKE - help - Set this option to y to enable MMA (Memory Margin Analysis) support - -config MMA_BLOBS_PATH - string "Path to MMA blobs" - depends on MMA - default "3rdparty/blobs/soc/intel/kabylake/mma-blobs" if SOC_INTEL_KABYLAKE - default "3rdparty/blobs/soc/intel/skylake/mma-blobs" if SOC_INTEL_SKYLAKE - -config SOC_INTEL_COMMON_ACPI - bool - default n - -config SOC_INTEL_COMMON_NHLT - bool - default n - -config TPM_TIS_ACPI_INTERRUPT - int - help - acpi_get_gpe() is used to provide interrupt status to TPM layer. - This option specifies the GPE number. - -config SOC_INTEL_DEBUG_CONSENT - bool "Enable SOC debug interface" - default n - help - Set this option to enable default debug interface of SoC such as DBC - or DCI. - -config SMM_MODULE_STACK_SIZE - hex - default 0x800 - -endif # SOC_INTEL_COMMON |