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| author | Michael Niewöhner <foss@mniewoehner.de> | 2019-10-22 23:05:06 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-11-04 19:25:02 +0000 |
| commit | 7736bfc443a913a9cde46406bcfc38015ec71f47 (patch) | |
| tree | 5b107551301bbaadc538b0c2ac7c52125462beb3 /src/soc/intel/common/block/cpu | |
| parent | e75a64f822931a5fbdd80f20c4d168a5c346e01a (diff) | |
| download | coreboot-7736bfc443a913a9cde46406bcfc38015ec71f47.tar.xz | |
soc/intel/sgx: convert SGX and PRMRR devicetree options to Kconfig
The devicetree is not made for user-choosable options, thus introduce
Kconfig options for both SGX and the corresponding PRMRR size.
The PRMRR size Kconfig has been implemented as a maximum value. At
runtime the final PRMRR size gets selected by checking the supported
values in MSR_PRMRR_VALID_CONFIG and trying to select the value nearest
to the chosen one.
When "Maximum" is chosen, the highest possibly value from the MSR gets
used. When a too strict limit is set, coreboot will die, printing an
error message.
Tested successfully on X11SSM-F
Change-Id: I5f08e85898304bba6680075ca5d6bce26aef9a4d
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35799
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/common/block/cpu')
| -rw-r--r-- | src/soc/intel/common/block/cpu/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/block/cpu/cpulib.c | 41 |
2 files changed, 42 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/Makefile.inc b/src/soc/intel/common/block/cpu/Makefile.inc index a6c4f37cc4..f263053430 100644 --- a/src/soc/intel/common/block/cpu/Makefile.inc +++ b/src/soc/intel/common/block/cpu/Makefile.inc @@ -7,6 +7,7 @@ romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c postcar-$(CONFIG_FSP_CAR) += car/exit_car_fsp.S ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 71e4dbf01b..89732f145a 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -325,3 +325,44 @@ void cpu_lt_lock_memory(void *unused) { msr_set_bit(MSR_LT_CONTROL, LT_CONTROL_LOCK_BIT); } + +int get_prmrr_size(void) +{ + msr_t msr; + int i; + int valid_size; + + if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_DISABLED)) { + printk(BIOS_DEBUG, "PRMRR disabled by config.\n"); + return 0; + } + + msr = rdmsr(MSR_PRMRR_VALID_CONFIG); + if (!msr.lo) { + printk(BIOS_WARNING, "PRMRR not supported.\n"); + return 0; + } + + printk(BIOS_DEBUG, "MSR_PRMRR_VALID_CONFIG = 0x%08x\n", msr.lo); + + /* find the first (greatest) value that is lower than or equal to the selected size */ + for (i = 8; i >= 0; i--) { + valid_size = msr.lo & (1 << i); + + if (valid_size && valid_size <= CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE) + break; + else if (i == 0) + valid_size = 0; + } + + /* die if we could not find a valid size within the limit */ + if (!valid_size) + die("Unsupported PRMRR size limit %i MiB, check your config!\n", + CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE); + + printk(BIOS_DEBUG, "PRMRR size set to %i MiB\n", valid_size); + + valid_size *= MiB; + + return valid_size; +} |