diff options
| author | Maulik <maulik.v.vaghela@intel.com> | 2018-01-05 22:40:35 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2018-08-10 06:31:01 +0000 |
| commit | fc19ab5f3465d8f8a861f7492634d0afe847f56d (patch) | |
| tree | 0002bba9ae5cf98224f6defaa677338bffe65662 /src/soc/intel/common/block/cpu | |
| parent | e819c857607bb4a1c2911e2073aa588f74789ee1 (diff) | |
| download | coreboot-fc19ab5f3465d8f8a861f7492634d0afe847f56d.tar.xz | |
src/soc/intel: Add new device IDs to support coffeelake
1. Add new device IDs for SATA, GT and Northbridge to pci_ids.h
2. Add entry to identify CFL U GT and CPU to respective files
3. Add entry to identify CFL U to report_platform.c
BUG=none
BRANCH=none
TEST=Boot to CFL U RVP board with this patch and check if coreboot is
able to enumerate various devices and display correct component names properly
in serial logs.
Change-Id: I47c97fb9eb813587cd655e2bce05a686091619ed
Signed-off-by: Maulik <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/27522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/common/block/cpu')
| -rw-r--r-- | src/soc/intel/common/block/cpu/mp_init.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 89c95a4c44..f52709dfce 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -72,6 +72,8 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_GLK_A0 }, { X86_VENDOR_INTEL, CPUID_GLK_B0 }, { X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_W0 }, + { X86_VENDOR_INTEL, CPUID_COFFEELAKE_U0 }, + { X86_VENDOR_INTEL, CPUID_COFFEELAKE_D0 }, { 0, 0 }, }; |