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| author | Aaron Durbin <adurbin@chromium.org> | 2017-04-16 22:05:36 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-04-25 18:14:38 +0200 |
| commit | e4d7abc0d448c7e805f2b48ed1251708d1f84c67 (patch) | |
| tree | 4ca1014c9d972063e7b44c8a373072008c6015fa /src/soc/intel/common/block/gspi | |
| parent | 4003950881af6fc4761aa0b177a3670d04ee9881 (diff) | |
| download | coreboot-e4d7abc0d448c7e805f2b48ed1251708d1f84c67.tar.xz | |
lib: provide clearer devicetree semantics
The devicetree data structures have been available in more than just
ramstage and romstage. In order to provide clearer and consistent
semantics two new macros are provided:
1. DEVTREE_EARLY which is true when !ENV_RAMSTAGE
2. DEVTREE_CONST as a replacment for ROMSTAGE_CONST
The ROMSTAGE_CONST attribute is used in the source code to mark
the devicetree data structures as const in early stages even though
it's not just romstage. Therefore, rename the attribute to
DEVTREE_CONST as that's the actual usage. The only place where the
usage was not devicetree related is console_loglevel, but the same
name was used for consistency. Any stage that is not ramstage has
the const C attribute applied when DEVTREE_CONST is used.
Change-Id: Ibd51c2628dc8f68e0896974f7e4e7c8588d333ed
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/19333
Tested-by: build bot (Jenkins)
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/block/gspi')
| -rw-r--r-- | src/soc/intel/common/block/gspi/gspi.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c index 74b94752b1..51e8ef54e1 100644 --- a/src/soc/intel/common/block/gspi/gspi.c +++ b/src/soc/intel/common/block/gspi/gspi.c @@ -107,13 +107,13 @@ #if defined(__SIMPLE_DEVICE__) static uintptr_t gspi_get_base_addr(int devfn, - ROMSTAGE_CONST struct device *dev) + DEVTREE_CONST struct device *dev) { pci_devfn_t pci_dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); return ALIGN_DOWN(pci_read_config32(pci_dev, PCI_BASE_ADDRESS_0), 16); } -static void gspi_set_base_addr(int devfn, ROMSTAGE_CONST struct device *dev, +static void gspi_set_base_addr(int devfn, DEVTREE_CONST struct device *dev, uintptr_t base) { pci_devfn_t pci_dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); @@ -172,7 +172,7 @@ static void gspi_set_base_addr(int devfn, struct device *dev, uintptr_t base) static uintptr_t gspi_calc_base_addr(unsigned int gspi_bus) { uintptr_t bus_base, gspi_base_addr; - ROMSTAGE_CONST struct device *dev; + DEVTREE_CONST struct device *dev; int devfn = gspi_soc_bus_to_devfn(gspi_bus); if (devfn < 0) |