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author | Aaron Durbin <adurbin@chromium.org> | 2018-01-22 20:29:25 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2018-01-24 05:02:59 +0000 |
commit | 9aee8194c46f31eeda6ee7419e40cad2de47187e (patch) | |
tree | 0f1edf8beb556064ec6f64475f71126d384cf669 /src/soc/intel/common/block/i2c/i2c_early.c | |
parent | 439cee90984ed9b5b614af2707aa0017528890d0 (diff) | |
download | coreboot-9aee8194c46f31eeda6ee7419e40cad2de47187e.tar.xz |
drivers/i2c/designware: namespace soc functions
Rename the following functions to ensure it's clear that the designware
i2c host controller driver is the one that these functions are
associated with:
i2c_get_soc_cfg() -> dw_i2c_get_soc_cfg()
i2c_get_soc_early_base() -> dw_i2c_get_soc_early_base()
i2c_soc_devfn_to_bus() -> dw_i2c_soc_devfn_to_bus()
i2c_soc_bus_to_devfn() -> dw_i2c_soc_bus_to_devfn()
BUG=b:72121803
Change-Id: Idb7633b45a0bb7cb7433ef5f6b154e28474a7b6d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/23371
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/block/i2c/i2c_early.c')
-rw-r--r-- | src/soc/intel/common/block/i2c/i2c_early.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/common/block/i2c/i2c_early.c b/src/soc/intel/common/block/i2c/i2c_early.c index f10147ed95..728e7880b5 100644 --- a/src/soc/intel/common/block/i2c/i2c_early.c +++ b/src/soc/intel/common/block/i2c/i2c_early.c @@ -32,7 +32,7 @@ static int lpss_i2c_early_init_bus(unsigned int bus) uintptr_t base; /* Find the PCI device for this bus controller */ - devfn = i2c_soc_bus_to_devfn(bus); + devfn = dw_i2c_soc_bus_to_devfn(bus); if (devfn < 0) { printk(BIOS_ERR, "I2C%u device not found\n", bus); return -1; @@ -47,14 +47,14 @@ static int lpss_i2c_early_init_bus(unsigned int bus) } /* Skip if not enabled for early init */ - config = i2c_get_soc_cfg(bus, tree_dev); + config = dw_i2c_get_soc_cfg(bus, tree_dev); if (!config || !config->early_init) { printk(BIOS_DEBUG, "I2C%u not enabled for early init\n", bus); return -1; } /* Prepare early base address for access before memory */ - base = i2c_get_soc_early_base(bus); + base = dw_i2c_get_soc_early_base(bus); pci_write_config32(dev, PCI_BASE_ADDRESS_0, base); pci_write_config32(dev, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); @@ -78,7 +78,7 @@ uintptr_t dw_i2c_base_address(unsigned int bus) uintptr_t base; /* Find device+function for this controller */ - devfn = i2c_soc_bus_to_devfn(bus); + devfn = dw_i2c_soc_bus_to_devfn(bus); if (devfn < 0) return (uintptr_t)NULL; |