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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-02-12 12:24:25 +0100
committerMartin Roth <martinroth@google.com>2018-02-20 23:17:39 +0000
commit5268b76801280667d8c27619fe2d771569c4e346 (patch)
tree075fa6b949b6719450755cdcdec912936a6754c2 /src/soc/intel/common/block/include/intelblocks/acpi.h
parente33f120cb808b946f3052019c9e4cf54b086491a (diff)
downloadcoreboot-5268b76801280667d8c27619fe2d771569c4e346.tar.xz
src/soc: Fix various typos
These typos were found through manual review and grep. Change-Id: I6693a9e3b51256b91342881a7116587f68ee96e6 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/23706 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks/acpi.h')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/acpi.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h
index 73a9c9c6cd..927da3c214 100644
--- a/src/soc/intel/common/block/include/intelblocks/acpi.h
+++ b/src/soc/intel/common/block/include/intelblocks/acpi.h
@@ -44,7 +44,7 @@ unsigned long southbridge_write_acpi_tables(device_t device,
struct acpi_rsdp *rsdp);
/*
- * Craetes acpi gnvs and adds it to the DSDT table.
+ * Creates acpi gnvs and adds it to the DSDT table.
* GNVS creation is chipset specific and is done in soc specific acpi.c file.
*/
void southbridge_inject_dsdt(device_t device);
@@ -84,7 +84,7 @@ void generate_t_state_entries(int core, int cores_per_package);
/*
* soc specific power states generation. We need this to be defined by soc
* as the state generations varies in chipsets e.g. APL generates T and P
- * states while SKL generates * P state only depening on a devicetree config
+ * states while SKL generates * P state only depending on a devicetree config
*/
void soc_power_states_generation(int core_id, int cores_per_package);