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author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2019-11-27 14:55:16 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-09 19:20:00 +0000 |
commit | ff072e6ebfb4f3cf5736e317688930e588a62ec2 (patch) | |
tree | e8407b4b4a18673002079a1a2e9a381c1ec3f2e0 /src/soc/intel/common/block/include/intelblocks/cse.h | |
parent | 8e4654527ef5fec658ca5aacad0612653d3dcf30 (diff) | |
download | coreboot-ff072e6ebfb4f3cf5736e317688930e588a62ec2.tar.xz |
soc/intel/common: Rename functions for consistent naming
Below changes are done:
1. Rename below functions to have consistent naming:
set_host_ready() -> cse_set_host_ready()
wait_cse_sec_override_mode() -> cse_wait_sec_override_mode()
send_hmrfpo_enable_msg() -> cse_hmrfpo_enable()
send_hmrfpo_get_status_msg() -> cse_hmrfpo_get_status()
2. Additional debug messages are added in cse_wait_sec_override_mode().
TEST=Build and Boot hatch board.
Change-Id: Icfcf1631cc37faacdea9ad84be55f5710104bad5
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37282
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks/cse.h')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cse.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 46730707c8..6233f7d193 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -51,7 +51,7 @@ enum { PCI_ME_HFSTS6 = 0x6C, }; -/* HECI Message Header */ +/* MKHI Message Header */ struct mkhi_hdr { uint8_t group_id; uint8_t command:7; @@ -103,14 +103,14 @@ uint32_t me_read_config32(int offset); */ bool is_cse_enabled(void); -/* Makes the host ready to communicate with CSE*/ -void set_host_ready(void); +/* Makes the host ready to communicate with CSE */ +void cse_set_host_ready(void); /* * Polls for ME state 'HECI_OP_MODE_SEC_OVERRIDE' for 15 seconds. * Returns 0 on failure and 1 on success. */ -uint8_t wait_cse_sec_override_mode(void); +uint8_t cse_wait_sec_override_mode(void); /* * Sends GLOBAL_RESET_REQ cmd to CSE.The reset type can be @@ -123,14 +123,14 @@ int send_heci_reset_req_message(uint8_t rst_type); * Send HMRFPO_ENABLE command. * returns 0 on failure and 1 on success. */ -int send_hmrfpo_enable_msg(void); +int cse_hmrfpo_enable(void); /* * Send HMRFPO_GET_STATUS command. * returns -1 on failure and 0 (DISABLED)/ 1 (LOCKED)/ 2 (ENABLED) * on success. */ -int send_hmrfpo_get_status_msg(void); +int cse_hmrfpo_get_status(void); /* Fixed Address MEI Header's Host Address field value */ #define BIOS_HOST_ADDR 0x00 |