summaryrefslogtreecommitdiff
path: root/src/soc/intel/common/block/include
diff options
context:
space:
mode:
authorSridhar Siricilla <sridhar.siricilla@intel.com>2020-02-06 15:31:04 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-02-17 15:56:55 +0000
commit3465d2730ba130f5aed18cb356d09e7104af2280 (patch)
tree6cfd9d1fbb6efc7cd94e86fc5afbc7377b8620fd /src/soc/intel/common/block/include
parent3e89b65c2cf634c1ba81da65d42aa64b53c5b244 (diff)
downloadcoreboot-3465d2730ba130f5aed18cb356d09e7104af2280.tar.xz
src/intel: Define HFSTS3 register
Changes: 1. Define HFSTS3 register across SoCs(apl/cnl/icl/tgl). 2. Define cse_is_hfs3_fw_sku_custom() which checks ME's Firmware SKU is Custom or not. TEST=Verified on hatch, soraka, bobba and iclrvp. Change-Id: I4188e58a4a08d87be2d84674e00ed1407fb8bf82 Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38798 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/soc/intel/common/block/include')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/cse.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h
index 6f8f4ff34c..af8d85272d 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse.h
@@ -186,4 +186,10 @@ bool cse_is_hfs1_com_secover_mei_msg(void);
*/
bool cse_is_hfs1_com_soft_temp_disable(void);
+/*
+ * Checks CSE's Firmware SKU is Custom or not.
+ * Returns true if CSE's Firmware SKU is Custom, otherwise false
+ */
+bool cse_is_hfs3_fw_sku_custom(void);
+
#endif // SOC_INTEL_COMMON_CSE_H