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author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-04 14:34:41 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-19 07:09:12 +0000 |
commit | 4e8baf9202a3de5dafeb1e26f95ded999ed5c667 (patch) | |
tree | fd8c458ad2c65d734b9003d3f9b18baaee26caa3 /src/soc/intel/common/block/include | |
parent | 4b6ff98e84832bbdaab002dc6d5c860ec3b37ad5 (diff) | |
download | coreboot-4e8baf9202a3de5dafeb1e26f95ded999ed5c667.tar.xz |
soc/intel/*: drop useless XTAL shutdown qualification code
The XTAL shutdown (dis)qualification bit already unconditionally gets
set to 1 by FSP for these platforms, making this code redundant.
Change-Id: I7fa4afb0de2af1814e5b91c152d82d7ead310338
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46016
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/include')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/pmclib.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h index fa063f293e..2acc275b2f 100644 --- a/src/soc/intel/common/block/include/intelblocks/pmclib.h +++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h @@ -232,7 +232,4 @@ uint8_t get_pm_pwr_cyc_dur(uint8_t slp_s4_min_assert, uint8_t slp_s3_min_assert, /* Disabling ACPI PM timer to ensure switches off TCO and necessary of XTAL OSC shutdown */ void pmc_disable_acpi_timer(void); -/* Disable XTAL shutdown qualification for low power idle. */ -void pmc_ignore_xtal_shutdown(void); - #endif /* SOC_INTEL_COMMON_BLOCK_PMCLIB_H */ |