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author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-11-10 13:39:37 -0700 |
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committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-12-10 17:45:47 +0000 |
commit | 56fcfb5b4f00830d0c1bf2230e1104045d795c82 (patch) | |
tree | 877ce586fdcf6f0acf82b9001661eba7aa1bc99b /src/soc/intel/common/block/include | |
parent | c0bdf89ff458f84e332aa861809a23997ce1b905 (diff) | |
download | coreboot-56fcfb5b4f00830d0c1bf2230e1104045d795c82.tar.xz |
soc/intel/common: Adapt XHCI elog driver for reuse
Currently this XHCI driver assumes the PCH XHCI controller, but the TCSS
or North XHCI block has a similar enough PCI MMIO structure to make this
code mostly reusable.
1) Rename everything to drop the `pch_` prefix
2) xhci_update_wake_event() now takes in a pci_devfn_t for the XHCI
controller
3) soc_get_xhci_usb_info() also now takes a pci_devfn_t for the XHCI
controller
BUG=b:172279037
TEST=plug in USB keyboard while in S0, enter S0ix and verify entry via
EC; type on keyboard, verify it wakes up, eventlog contains:
39 | 2020-12-10 09:40:21 | S0ix Enter
40 | 2020-12-10 09:40:42 | S0ix Exit
41 | 2020-12-10 09:40:42 | Wake Source | PME - XHCI (USB 2.0 port) | 1
42 | 2020-12-10 09:40:42 | Wake Source | GPE # | 109
which verifies it still functions for the PCH XHCI controller
Change-Id: I9f28354e031e3eda587f4faf8ef7595dce8b33ea
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47411
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/include')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/xhci.h | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/xhci.h b/src/soc/intel/common/block/include/intelblocks/xhci.h index 568d2924fb..1adcbc0167 100644 --- a/src/soc/intel/common/block/include/intelblocks/xhci.h +++ b/src/soc/intel/common/block/include/intelblocks/xhci.h @@ -4,6 +4,8 @@ #define SOC_INTEL_COMMON_BLOCK_XHCI_H #include <device/device.h> +#include <elog.h> +#include <stdint.h> /* * struct xhci_usb_info - Data containing number of USB ports & offset. @@ -20,7 +22,19 @@ struct xhci_usb_info { }; /* - * pch_xhci_update_wake_event() - Identify and log XHCI wake events. + * struct xhci_wake_info - Relates an XHCI device to registers and wake types + * @xhci_dev: devfn of the XHCI device + * @elog_wake_type_host: the wake type for the controller device + */ +struct xhci_wake_info { + pci_devfn_t xhci_dev; + uint8_t elog_wake_type_host; +}; + +/* + * xhci_update_wake_event() - Identify and log XHCI wake events. + * @wake_info: A mapping of XHCI devfn to elog wake types + * @wake_info_count: Count of items in wake_info * @info: Information about number of USB ports and their status reg offset. * * This function goes through individual USB port status registers within the @@ -29,7 +43,8 @@ struct xhci_usb_info { * * Return: True if any port is identified as a wake source, false if none. */ -bool pch_xhci_update_wake_event(const struct xhci_usb_info *info); +bool xhci_update_wake_event(const struct xhci_wake_info *wake_info, + size_t wake_info_count); void soc_xhci_init(struct device *dev); @@ -41,7 +56,7 @@ void soc_xhci_init(struct device *dev); * * Return: USB ports and status register offset info for the SoC. */ -const struct xhci_usb_info *soc_get_xhci_usb_info(void); +const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev); /* * usb_xhci_disable_unused() - Disable unused USB devices |