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author | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-12 21:00:03 +0100 |
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committer | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-20 10:17:22 +0000 |
commit | f629f7b78bb89ede0a1d9070dec3a7d71950899e (patch) | |
tree | 8f3f8486bb1e90aefc07446a9950c20351bc19fa /src/soc/intel/common/block/include | |
parent | a8798a317983508385138bb39f41e5e614e957f6 (diff) | |
download | coreboot-f629f7b78bb89ede0a1d9070dec3a7d71950899e.tar.xz |
soc/intel/common/block/p2sb: Add hpet BDF functions
This allows to get/set the HPET bus device function.
Change-Id: I8d72da8bc392aa144d167d31cde30cc71cd1396e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47531
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/include')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/p2sb.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/p2sb.h b/src/soc/intel/common/block/include/intelblocks/p2sb.h index 71f9c6255d..819b9403a3 100644 --- a/src/soc/intel/common/block/include/intelblocks/p2sb.h +++ b/src/soc/intel/common/block/include/intelblocks/p2sb.h @@ -29,6 +29,18 @@ void p2sb_disable_sideband_access(void); void p2sb_enable_bar(void); void p2sb_configure_hpet(void); +union p2sb_bdf { + struct { + uint16_t fn : 3; + uint16_t dev : 5; + uint16_t bus : 8; + }; + uint16_t raw; +}; + +union p2sb_bdf p2sb_get_hpet_bdf(void); +void p2sb_set_hpet_bdf(union p2sb_bdf bdf); + /* SOC overrides */ /* * Each SoC should implement EP Mask register to disable SB access |