diff options
author | Duncan Laurie <dlaurie@google.com> | 2018-05-07 15:33:18 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-18 12:23:04 +0000 |
commit | bf713b04b6f04ebf91eea40867a5354c958182f4 (patch) | |
tree | 26c5cd230df30c7645420eeb8f7ca476e65b15b1 /src/soc/intel/common/block/include | |
parent | 4721f43390ec732cb2ef82911da098779f4db0c4 (diff) | |
download | coreboot-bf713b04b6f04ebf91eea40867a5354c958182f4.tar.xz |
soc/intel: Add support for USB ACPI code generation
To support generating USB devices in ACPI the platform needs to
know how to determine a device name for each USB port, and for
any root hubs that may be present.
Recent Intel platforms route all ports to an XHCI controller
through a root hub. This is supported by considering the root
hub to be USB port type 0, the USB 2.0 ports to be type 2, and
the USB 3.0 ports to be type 3.
This was tested with a Kaby Lake platform by adding entries to
the devicetree and checking the resulting SSDT.
Change-Id: I527a63bdc64f9243fe57487363ee6d5f60be84ca
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/26174
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/block/include')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/acpi.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h index 927da3c214..f58f914757 100644 --- a/src/soc/intel/common/block/include/intelblocks/acpi.h +++ b/src/soc/intel/common/block/include/intelblocks/acpi.h @@ -29,6 +29,9 @@ struct chipset_power_state; /* Forward declare the global nvs structure here */ struct global_nvs_t; +/* Return ACPI name for this device */ +const char *soc_acpi_name(const struct device *dev); + /* Read the scis from soc specific register. Returns int scis value */ uint32_t soc_read_sci_irq_select(void); |