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author | Patrick Rudolph <siro@das-labor.org> | 2019-10-04 09:22:27 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2019-10-05 13:48:15 +0000 |
commit | 8d7a89b271959d0817a9682f9b2e9b1436103b95 (patch) | |
tree | 2a0dbe0cf2a605b08ff2813f927d683df7f81c15 /src/soc/intel/common/block/p2sb | |
parent | f9891c8b469232cca28f0b12f613274f127748df (diff) | |
download | coreboot-8d7a89b271959d0817a9682f9b2e9b1436103b95.tar.xz |
soc/intel/common/block/p2sb/p2sb: Add missing PCI IDs
The code is compiled on SKL/KBL, but the P2SB PCI IDs were missing.
Add them to make sure that the BAR0 doesn't change when running PCI
resource allocation.
Change-Id: I7cffbbc7d15dad14cccd122a081099b51dc1ce07
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/block/p2sb')
-rw-r--r-- | src/soc/intel/common/block/p2sb/p2sb.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index 1df05679dd..14e1fd90eb 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -155,6 +155,8 @@ static void read_resources(struct device *dev) /* * There's only one resource on the P2SB device. It's also already * manually set to a fixed address in earlier boot stages. + * The following code makes sure that it doesn't change if the device + * is visible and the resource allocator is being run. */ mmio_resource(dev, PCI_BASE_ADDRESS_0, P2SB_BAR / KiB, P2SB_SIZE / KiB); } @@ -170,6 +172,9 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_GLK_P2SB, PCI_DEVICE_ID_INTEL_LWB_P2SB, PCI_DEVICE_ID_INTEL_LWB_P2SB_SUPER, + PCI_DEVICE_ID_INTEL_SKL_LP_P2SB, + PCI_DEVICE_ID_INTEL_SKL_P2SB, + PCI_DEVICE_ID_INTEL_KBL_P2SB, PCI_DEVICE_ID_INTEL_CNL_P2SB, PCI_DEVICE_ID_INTEL_CNP_H_P2SB, PCI_DEVICE_ID_INTEL_ICL_P2SB, |