diff options
author | Tan, Lean Sheng <lean.sheng.tan@intel.com> | 2020-01-20 19:13:56 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-01-22 15:42:26 +0000 |
commit | 26136092c01b8d29fde68058597b74923c21a41f (patch) | |
tree | a95aa8cd3df3197a72d56e396dfa9fc86fb301fa /src/soc/intel/common/block/pcie | |
parent | 8406179eff18144cad3584f28554186baf8e1a37 (diff) | |
download | coreboot-26136092c01b8d29fde68058597b74923c21a41f.tar.xz |
soc/intel/common: Add Elkhartlake Device IDs
Add Elkhartlake CPU, SA and PCH IDs.
EHL PCH is code named as MCC.
Also add a MCH ID (JSL_EHL) which is shared by both JSL and EHL SKUs.
Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: I03f15832143bcc3095a3936c65fbc30a95e7f0f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38489
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/pcie')
-rw-r--r-- | src/soc/intel/common/block/pcie/pcie.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c index ce43d3400e..eab6667b7f 100644 --- a/src/soc/intel/common/block/pcie/pcie.c +++ b/src/soc/intel/common/block/pcie/pcie.c @@ -298,6 +298,13 @@ static const unsigned short pcie_device_ids[] = { PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP6, PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP7, PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP8, + PCI_DEVICE_ID_INTEL_MCC_PCIE_RP1, + PCI_DEVICE_ID_INTEL_MCC_PCIE_RP2, + PCI_DEVICE_ID_INTEL_MCC_PCIE_RP3, + PCI_DEVICE_ID_INTEL_MCC_PCIE_RP4, + PCI_DEVICE_ID_INTEL_MCC_PCIE_RP5, + PCI_DEVICE_ID_INTEL_MCC_PCIE_RP6, + PCI_DEVICE_ID_INTEL_MCC_PCIE_RP7, 0 }; |