diff options
author | Duncan Laurie <dlaurie@google.com> | 2020-10-10 00:05:36 +0000 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-09 07:32:13 +0000 |
commit | 44caa1963fb9e3aa0a392223dab3b9c33acdc441 (patch) | |
tree | 55972f116bd121b5b4d19e39a10d632b63e83b55 /src/soc/intel/common/block/pmc/Kconfig | |
parent | 74c16d0a8ba76f07b17d0db58071933b7d7f12b6 (diff) | |
download | coreboot-44caa1963fb9e3aa0a392223dab3b9c33acdc441.tar.xz |
intel/common/pmc: Add functions for IPC mailbox in ACPI
This change adds two functions that provide an IPC mailbox method via
ACPI for runtime clock configuration.
pmc_acpi_fill_ssdt_ipc_write_method() will provide a method in the SSDT
that can be called by other ACPI devices to send an IPC mailbox command.
This function is exported because some SOCs override the default PMC
device and need to call this function to write the method into the SSDT.
pmc_acpi_set_pci_clock() will call the method defined by the previous
function to enable or disable the PCIe SRCCLK for a specified root port
and clock pin. It can be called by the PCIe root port after turning off
power to the attached device.
BUG=b:160996445
TEST=boot on volteer device and disassemble the SSDT to ensure that this
method exists.
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I95f5a1ba2bc6905e0f8ce0e8b2342ad1287a23a0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46259
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/pmc/Kconfig')
-rw-r--r-- | src/soc/intel/common/block/pmc/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig index ce41b23620..5cb2bea1d9 100644 --- a/src/soc/intel/common/block/pmc/Kconfig +++ b/src/soc/intel/common/block/pmc/Kconfig @@ -22,6 +22,14 @@ config PMC_INVALID_READ_AFTER_WRITE Enable this for PMC devices where a read back of ACPI BAR and IO access bit does not return the previously written value. +config PMC_IPC_ACPI_INTERFACE + bool + default n + depends on HAVE_ACPI_TABLES + help + Enable this to have the PMC IPC mailbox ACPI interface added + to the SSDT for use by other drivers. + config PMC_GLOBAL_RESET_ENABLE_LOCK bool help |