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| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2019-12-12 13:15:30 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-13 09:05:07 +0000 |
| commit | d1613f5681f17c02e5219342a0edc39e4aed685d (patch) | |
| tree | f888bd074a1fa776bb80fefe8659990a4ede6f51 /src/soc/intel/common/block/sram | |
| parent | 98b72dadf07bf8694f78384d21a4add7ac76c1f2 (diff) | |
| download | coreboot-d1613f5681f17c02e5219342a0edc39e4aed685d.tar.xz | |
libpayload/drivers/i8042: Add error handling
Add error handling on I8042_CMD_WR_CMD_BYTE failure.
BUG=b:145130110
TEST=Draillion keyboard is usable on every boot.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I56c472ae7e399d4862c6e41b70f53a21d718157d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37664
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/sram')
0 files changed, 0 insertions, 0 deletions