diff options
| author | Aamir Bohra <aamir.bohra@intel.com> | 2017-04-26 19:30:41 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-05-09 17:55:28 +0200 |
| commit | 83f7baec308cffee0709e38c95e3b4726915e2ea (patch) | |
| tree | 9e9169e15d686e33d11600927f1a04298c3b3a59 /src/soc/intel/common/block/uart/Makefile.inc | |
| parent | 502131a6ad3f3eae89ccd85402708ae90a6f2b4f (diff) | |
| download | coreboot-83f7baec308cffee0709e38c95e3b4726915e2ea.tar.xz | |
soc/intel/common: Add PCI configuration code for UART
Add PCI configuration code support for intel/common/
block/uart module.
Change-Id: Ibce5623ffb879f2427b759106d1f350601837e4b
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/uart/Makefile.inc')
| -rw-r--r-- | src/soc/intel/common/block/uart/Makefile.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/uart/Makefile.inc b/src/soc/intel/common/block/uart/Makefile.inc index 13f5da880f..0ec5314d66 100644 --- a/src/soc/intel/common/block/uart/Makefile.inc +++ b/src/soc/intel/common/block/uart/Makefile.inc @@ -1 +1,2 @@ -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c
\ No newline at end of file +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c
\ No newline at end of file |