summaryrefslogtreecommitdiff
path: root/src/soc/intel/common/block
diff options
context:
space:
mode:
authorNico Huber <nico.h@gmx.de>2020-04-26 19:24:00 +0200
committerNico Huber <nico.h@gmx.de>2020-05-27 21:34:58 +0000
commit826094f65cf8778bd120e08917ef5557d0bad49d (patch)
tree739210a720f37af2af8154e21ffb778801f238e9 /src/soc/intel/common/block
parentf2a0be235cdf72caff549a1cfe0b986bdd99e93b (diff)
downloadcoreboot-826094f65cf8778bd120e08917ef5557d0bad49d.tar.xz
soc/intel/gma: Move display and opregion init to common code
Change-Id: I359b529df44db7d63c5a7922cb1ebd8e130d0c43 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40725 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/graphics/graphics.c42
1 files changed, 39 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index ae45d67214..5110aad3d6 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -1,11 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <assert.h>
+#include <bootmode.h>
#include <console/console.h>
#include <device/mmio.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <drivers/intel/gma/i915.h>
+#include <drivers/intel/gma/libgfxinit.h>
+#include <drivers/intel/gma/opregion.h>
#include <intelblocks/graphics.h>
#include <soc/pci_devs.h>
@@ -15,9 +18,7 @@ __weak void graphics_soc_init(struct device *dev)
/*
* User needs to implement SoC override in case wishes
* to perform certain specific graphics initialization
- * along with pci_dev_init(dev)
*/
- pci_dev_init(dev);
}
__weak const struct i915_gpu_controller_info *
@@ -26,6 +27,41 @@ intel_igd_get_controller_info(const struct device *device)
return NULL;
}
+static void gma_init(struct device *const dev)
+{
+ intel_gma_init_igd_opregion();
+
+ /* SoC specific configuration. */
+ graphics_soc_init(dev);
+
+ /*
+ * GFX PEIM module inside FSP binary is taking care of graphics
+ * initialization based on RUN_FSP_GOP Kconfig option and input
+ * VBT file.
+ *
+ * In case of non-FSP solution, SoC need to select another
+ * Kconfig to perform GFX initialization.
+ */
+ if (CONFIG(RUN_FSP_GOP))
+ return;
+
+ /* IGD needs to Bus Master */
+ u32 reg32 = pci_read_config32(dev, PCI_COMMAND);
+ reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
+ pci_write_config32(dev, PCI_COMMAND, reg32);
+
+ if (CONFIG(MAINBOARD_USE_LIBGFXINIT)) {
+ if (!acpi_is_wakeup_s3() && display_init_required()) {
+ int lightup_ok;
+ gma_gfxinit(&lightup_ok);
+ gfx_set_init_done(lightup_ok);
+ }
+ } else {
+ /* Initialize PCI device, load/execute BIOS Option ROM */
+ pci_dev_init(dev);
+ }
+}
+
static void gma_generate_ssdt(const struct device *device)
{
const struct i915_gpu_controller_info *gfx = intel_igd_get_controller_info(device);
@@ -116,7 +152,7 @@ static const struct device_operations graphics_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .init = graphics_soc_init,
+ .init = gma_init,
.ops_pci = &pci_dev_ops_pci,
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_fill_ssdt = gma_generate_ssdt,