diff options
| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-06-20 17:26:21 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-12 19:43:23 +0000 |
| commit | c0dfa7596b09a5a8e63ef726caf11faa6003be1b (patch) | |
| tree | ea8aee59e96f0816c31322c832f60f19b8fef3dd /src/soc/intel/common/block | |
| parent | 3787b67d41e05ae483c5e6914aaba46a59e2918d (diff) | |
| download | coreboot-c0dfa7596b09a5a8e63ef726caf11faa6003be1b.tar.xz | |
soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL()
Converts PAD_CFG0_RX_POL_* macros to PAD_RX_POL() to make the code
cleaner and reduce the length of the macro.
Tested with BUILD_TIMELESS=1, Kontron COMe-mAL10 on T10-TNI carrierboard
does not change.
Change-Id: I09a048fd38ccb994f53c8829c549bc2b368fa546
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41033
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/gpio_defs.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index f6e139d52d..e257f07215 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -124,6 +124,7 @@ #define PAD_FUNC(value) PAD_CFG0_MODE_##value #define PAD_RESET(value) PAD_CFG0_LOGICAL_RESET_##value +#define PAD_RX_POL(value) PAD_CFG0_RX_POL_##value #define PAD_TRIG(value) PAD_CFG0_TRIG_##value #define PAD_PULL(value) PAD_CFG1_PULL_##value @@ -147,14 +148,14 @@ #define PAD_IRQ_CFG(route, trig, inv) \ (PAD_CFG0_ROUTE_##route | \ PAD_TRIG(trig) | \ - PAD_CFG0_RX_POL_##inv) + PAD_RX_POL(inv)) #if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT) #define PAD_IRQ_CFG_DUAL_ROUTE(route1, route2, trig, inv) \ (PAD_CFG0_ROUTE_##route1 | \ PAD_CFG0_ROUTE_##route2 | \ PAD_TRIG(trig) | \ - PAD_CFG0_RX_POL_##inv) + PAD_RX_POL(inv)) #endif /* CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT */ #define _PAD_CFG_STRUCT(__pad, __config0, __config1) \ @@ -272,7 +273,7 @@ */ #define PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own) \ _PAD_CFG_STRUCT(pad, PAD_FUNC(GPIO) | PAD_RESET(rst) | \ - PAD_TRIG(trig) | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_DISABLE), \ + PAD_TRIG(trig) | PAD_RX_POL(NONE) | PAD_BUF(TX_DISABLE), \ PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE) | PAD_CFG_OWN_GPIO(own)) #define PAD_CFG_GPI_GPIO_DRIVER(pad, pull, rst) \ |