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authorMichael Niewöhner <foss@mniewoehner.de>2019-11-02 12:12:36 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-11 10:25:55 +0000
commit28552095d8a4eee588923a11c3f3921a2492b140 (patch)
treef4e0c0bb3404bba0b10232723784ec7294330b9d /src/soc/intel/common/block
parent8f22136c051f04ef0102fd468ba01a0f10f1a37c (diff)
downloadcoreboot-28552095d8a4eee588923a11c3f3921a2492b140.tar.xz
soc/intel/common: pmclib: add API to get ETR register address
Add a new API to get the ETR register address. Change-Id: I706f3e220d639a6133625e3cb7267f7009006af2 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36565 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/pmclib.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h
index caf21f0ca6..7cc501df7e 100644
--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h
+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h
@@ -169,6 +169,9 @@ void pmc_gpe_init(void);
/* Returns PMC base address */
uintptr_t soc_read_pmc_base(void);
+/* Returns pointer to the ETR register */
+uint32_t *soc_pmc_etr_addr(void);
+
/*
* This function returns array of string which represents
* names for the SMI status register bits. Size of the array is