summaryrefslogtreecommitdiff
path: root/src/soc/intel/common/block
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2018-06-12 22:06:09 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-06-14 09:30:24 +0000
commit68c851bcd702e7816cdb6e504f7386ec404ecf13 (patch)
tree4f54fa935d738ff5e6fc473ba37bfc03a8ecb2ef /src/soc/intel/common/block
parentc8a649c08f92d4d2255626da4e1cd7a6d71469e7 (diff)
downloadcoreboot-68c851bcd702e7816cdb6e504f7386ec404ecf13.tar.xz
src: Get rid of device_t
Use of device_t is deprecated. Change-Id: I6adc0429ae9ecc8f726d6167a6458d9333dc515f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27036 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/acpi/acpi.c6
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c6
-rw-r--r--src/soc/intel/common/block/cse/cse.c6
-rw-r--r--src/soc/intel/common/block/fast_spi/fast_spi.c30
-rw-r--r--src/soc/intel/common/block/lpc/lpc_lib.c12
-rw-r--r--src/soc/intel/common/block/pcr/pcr.c6
-rw-r--r--src/soc/intel/common/block/smm/smihandler.c6
-rw-r--r--src/soc/intel/common/block/uart/uart.c6
8 files changed, 61 insertions, 17 deletions
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index 02ab886ac0..01a4928b14 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -164,7 +164,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
soc_fill_fadt(fadt);
}
-unsigned long southbridge_write_acpi_tables(device_t device,
+unsigned long southbridge_write_acpi_tables(struct device *device,
unsigned long current,
struct acpi_rsdp *rsdp)
{
@@ -224,7 +224,7 @@ __weak void acpi_create_gnvs(struct global_nvs_t *gnvs)
{
}
-void southbridge_inject_dsdt(device_t device)
+void southbridge_inject_dsdt(struct device *device)
{
struct global_nvs_t *gnvs;
@@ -407,7 +407,7 @@ __weak void soc_power_states_generation(int core_id,
{
}
-void generate_cpu_entries(device_t device)
+void generate_cpu_entries(struct device *device)
{
int core_id, cpu_id, pcontrol_blk = ACPI_BASE_ADDRESS;
int plen = 6;
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 97ad176a20..e264348055 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -31,7 +31,7 @@
static const void *microcode_patch;
/* SoC override function */
-__weak void soc_core_init(device_t dev)
+__weak void soc_core_init(struct device *dev)
{
/* no-op */
}
@@ -41,7 +41,7 @@ __weak void soc_init_cpus(struct bus *cpu_bus)
/* no-op */
}
-static void init_one_cpu(device_t dev)
+static void init_one_cpu(struct device *dev)
{
soc_core_init(dev);
intel_microcode_load_unlocked(microcode_patch);
@@ -121,7 +121,7 @@ void get_microcode_info(const void **microcode, int *parallel)
static void init_cpus(void *unused)
{
- device_t dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);
+ struct device *dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);
assert(dev != NULL);
microcode_patch = intel_microcode_find();
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 4991db6126..8651297905 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -80,7 +80,11 @@ struct cse_device {
void heci_init(uintptr_t tempbar)
{
struct cse_device *cse = car_get_var_ptr(&g_cse);
- device_t dev = PCH_DEV_CSE;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_CSE;
+#else
+ struct device *dev = PCH_DEV_CSE;
+#endif
u8 pcireg;
/* Assume it is already initialized, nothing else to do */
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index b13408af7b..e7f81fc323 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -34,7 +34,11 @@
*/
void *fast_spi_get_bar(void)
{
- device_t dev = PCH_DEV_SPI;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_SPI;
+#else
+ struct device *dev = PCH_DEV_SPI;
+#endif
uintptr_t bar;
bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
@@ -51,7 +55,11 @@ void *fast_spi_get_bar(void)
*/
void fast_spi_init(void)
{
- device_t dev = PCH_DEV_SPI;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_SPI;
+#else
+ struct device *dev = PCH_DEV_SPI;
+#endif
uint8_t bios_cntl;
bios_cntl = pci_read_config8(dev, SPIBAR_BIOS_CONTROL);
@@ -71,7 +79,11 @@ void fast_spi_init(void)
*/
static void fast_spi_set_bios_control_reg(uint8_t bios_cntl_bit)
{
- device_t dev = PCH_DEV_SPI;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_SPI;
+#else
+ struct device *dev = PCH_DEV_SPI;
+#endif
uint8_t bc_cntl;
assert((bios_cntl_bit & (bios_cntl_bit - 1)) == 0);
@@ -253,7 +265,11 @@ void fast_spi_cache_bios_region(void)
*/
void fast_spi_early_init(uintptr_t spi_base_address)
{
- device_t dev = PCH_DEV_SPI;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_SPI;
+#else
+ struct device *dev = PCH_DEV_SPI;
+#endif
uint8_t pcireg;
/* Assign Resources to SPI Controller */
@@ -285,7 +301,11 @@ bool fast_spi_wpd_status(void)
/* Enable SPI Write Protect. */
void fast_spi_enable_wp(void)
{
- device_t dev = PCH_DEV_SPI;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_SPI;
+#else
+ struct device *dev = PCH_DEV_SPI;
+#endif
uint8_t bios_cntl;
bios_cntl = pci_read_config8(dev, SPIBAR_BIOS_CONTROL);
diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c
index 58b588e508..d27f877c85 100644
--- a/src/soc/intel/common/block/lpc/lpc_lib.c
+++ b/src/soc/intel/common/block/lpc/lpc_lib.c
@@ -167,7 +167,11 @@ bool lpc_fits_fixed_mmio_window(uintptr_t base, size_t size)
*/
static void lpc_set_bios_control_reg(uint8_t bios_cntl_bit)
{
- device_t dev = PCH_DEV_LPC;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_LPC;
+#else
+ struct device *dev = PCH_DEV_LPC;
+#endif
uint8_t bc_cntl;
assert(IS_POWER_OF_2(bios_cntl_bit));
@@ -210,7 +214,11 @@ void lpc_set_eiss(void)
*/
void lpc_set_serirq_mode(enum serirq_mode mode)
{
- device_t dev = PCH_DEV_LPC;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_LPC;
+#else
+ struct device *dev = PCH_DEV_LPC;
+#endif
uint8_t scnt;
scnt = pci_read_config8(dev, LPC_SERIRQ_CTL);
diff --git a/src/soc/intel/common/block/pcr/pcr.c b/src/soc/intel/common/block/pcr/pcr.c
index cf50fdc0aa..b8d798ffe2 100644
--- a/src/soc/intel/common/block/pcr/pcr.c
+++ b/src/soc/intel/common/block/pcr/pcr.c
@@ -254,7 +254,11 @@ static int pcr_wait_for_completion(device_t dev)
int pcr_execute_sideband_msg(struct pcr_sbi_msg *msg, uint32_t *data,
uint8_t *response)
{
- device_t dev = PCH_DEV_P2SB;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_P2SB;
+#else
+ struct device *dev = PCH_DEV_P2SB;
+#endif
uint32_t sbi_data;
uint16_t sbi_status;
uint16_t sbi_rid;
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index d8ac2f3469..b49f2a3f3b 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -134,7 +134,11 @@ static void busmaster_disable_on_bus(int bus)
for (slot = 0; slot < 0x20; slot++) {
for (func = 0; func < 8; func++) {
u32 reg32;
- device_t dev = PCI_DEV(bus, slot, func);
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCI_DEV(bus, slot, func);
+#else
+ struct device *dev = PCI_DEV(bus, slot, func);
+#endif
if (!smihandler_soc_disable_busmaster(dev))
continue;
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index cdbe56b519..b84a7ec534 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -59,7 +59,11 @@ __weak device_t pch_uart_get_debug_controller(void)
bool uart_debug_controller_is_initialized(void)
{
- device_t dev;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev;
+#else
+ struct device *dev;
+#endif
uintptr_t base;
dev = pch_uart_get_debug_controller();