diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2016-06-21 10:41:19 -0700 |
---|---|---|
committer | Duncan Laurie <dlaurie@chromium.org> | 2016-07-01 18:51:51 +0200 |
commit | 222381e390191d7a4476642ae0e544c96349a096 (patch) | |
tree | 1958377e5a15f05aff00bc4a713d851c16783b9d /src/soc/intel/common/lpss_i2c.c | |
parent | cc37c85ab4edb0c5d3d0c3e82865b65e0f469875 (diff) | |
download | coreboot-222381e390191d7a4476642ae0e544c96349a096.tar.xz |
skylake: Generate ACPI timing values for I2C devices
Have the Skylake SOC generate ACPI timing values for the enabled I2C
controllers instead of passing it in the DSDT with static timings.
The timing values are generated from the controller clock speed and
are more accurate than the hardcoded values that were in the ASL which
were originally copied from Broadwell where the controller is running
at a different clock speed...
Additionally it is now possible for a board to override the values
using devicetree.cb. If zero is passed in for SCL HCNT or LCNT then
the kernel will generate its own timing using the same forumla, but if
the SDA hold time value is zero the kernel will NOT generate a correct
value and the SDA hold time may be incorrect.
This was tested on the Chell platform to ensure all the I2C devices on
the board are still operational with these new timing values.
Change-Id: I4feb3df9e083592792f8fadd7105e081a984a906
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/15291
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/lpss_i2c.c')
-rw-r--r-- | src/soc/intel/common/lpss_i2c.c | 44 |
1 files changed, 43 insertions, 1 deletions
diff --git a/src/soc/intel/common/lpss_i2c.c b/src/soc/intel/common/lpss_i2c.c index bb684e2f35..a9bbbb32a7 100644 --- a/src/soc/intel/common/lpss_i2c.c +++ b/src/soc/intel/common/lpss_i2c.c @@ -20,6 +20,7 @@ #include <console/console.h> #include <device/device.h> #include <device/i2c.h> +#include <string.h> #include <timer.h> #include "lpss_i2c.h" @@ -305,7 +306,17 @@ int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int count) return 0; } -void lpss_i2c_acpi_write_speed_config( +/* + * Write ACPI object to describe speed configuration. + * + * ACPI Object: Name ("xxxx", Package () { scl_lcnt, scl_hcnt, sda_hold } + * + * SSCN: I2C_SPEED_STANDARD + * FMCN: I2C_SPEED_FAST + * FPCN: I2C_SPEED_FAST_PLUS + * HSCN: I2C_SPEED_HIGH + */ +static void lpss_i2c_acpi_write_speed_config( const struct lpss_i2c_speed_config *config) { if (!config) @@ -330,6 +341,37 @@ void lpss_i2c_acpi_write_speed_config( acpigen_pop_len(); } +void lpss_i2c_acpi_fill_ssdt(const struct lpss_i2c_speed_config *override) +{ + const struct lpss_i2c_speed_config *sptr; + struct lpss_i2c_speed_config sgen; + enum i2c_speed speeds[LPSS_I2C_SPEED_CONFIG_COUNT] = { + I2C_SPEED_STANDARD, + I2C_SPEED_FAST, + I2C_SPEED_FAST_PLUS, + I2C_SPEED_HIGH, + }; + int i; + + /* Report timing values for the OS driver */ + for (i = 0; i < LPSS_I2C_SPEED_CONFIG_COUNT; i++) { + /* Generate speed config for default case */ + if (lpss_i2c_gen_speed_config(speeds[i], &sgen) < 0) + continue; + + /* Apply board specific override for this speed if found */ + for (sptr = override; sptr && sptr->speed; sptr++) { + if (sptr->speed == speeds[i]) { + memcpy(&sgen, sptr, sizeof(sgen)); + break; + } + } + + /* Generate ACPI based on selected speed config */ + lpss_i2c_acpi_write_speed_config(&sgen); + } +} + int lpss_i2c_set_speed_config(unsigned bus, const struct lpss_i2c_speed_config *config) { |