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| author | Duncan Laurie <dlaurie@google.com> | 2020-04-08 11:35:52 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2020-04-17 20:00:08 +0000 |
| commit | 1e066117684997ff44af435854b885b6abf52c3f (patch) | |
| tree | 7424335eb07dcd5a29c37512fd8133439f761df9 /src/soc/intel/common/pch | |
| parent | a95907b0666c764aaddeaffc7a414c49bbb47d7b (diff) | |
| download | coreboot-1e066117684997ff44af435854b885b6abf52c3f.tar.xz | |
soc/intel: Disable config option for SCS by default
The eMMC/SD interface is not present in all Intel platforms so this
change removes the default enable for the storage controller and
instead enables it in the specific SoCs that do provide it.
Currently this includes all platforms except Tigerlake.
Change-Id: I8b6cab41dbd5080f4a7801f01279f47e80ceaefd
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40371
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/common/pch')
| -rw-r--r-- | src/soc/intel/common/pch/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/common/pch/Kconfig b/src/soc/intel/common/pch/Kconfig index 1e8cdcdc23..cca65d6b2a 100644 --- a/src/soc/intel/common/pch/Kconfig +++ b/src/soc/intel/common/pch/Kconfig @@ -33,7 +33,6 @@ config PCH_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_PMC select SOC_INTEL_COMMON_BLOCK_RTC select SOC_INTEL_COMMON_BLOCK_SATA - select SOC_INTEL_COMMON_BLOCK_SCS select SOC_INTEL_COMMON_BLOCK_SMBUS select SOC_INTEL_COMMON_BLOCK_SPI select SOC_INTEL_COMMON_BLOCK_TCO |