summaryrefslogtreecommitdiff
path: root/src/soc/intel/common/vbt.c
diff options
context:
space:
mode:
authorLee Leahy <leroy.p.leahy@intel.com>2015-10-15 12:07:03 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-10-27 15:19:03 +0100
commit94b856ef9afaca880909d22b24d5443408c47920 (patch)
tree14a76715a13535b5c2991103adf4820f776f1dd5 /src/soc/intel/common/vbt.c
parent597de2849d8a0861ba0d7fca32948bdf37378eed (diff)
downloadcoreboot-94b856ef9afaca880909d22b24d5443408c47920.tar.xz
FSP 1.1: Move common FSP code
Move the FSP common code from the src/soc/intel/common directory into the src/drivers/intel/fsp1_1 directory. Rename the Kconfig values associated with this common code. BRANCH=none BUG=None TEST=Build and run on kunimitsu Change-Id: If1ca613b5010424c797e047c2258760ac3724a5a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e8228cb2a12df1cc06646071fafe10e50bf01440 Original-Change-Id: I4ea84ea4e3e96ae0cfdbbaeb1316caee83359293 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/306350 Original-Commit-Ready: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12156 Tested-by: build bot (Jenkins) Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Diffstat (limited to 'src/soc/intel/common/vbt.c')
-rw-r--r--src/soc/intel/common/vbt.c51
1 files changed, 0 insertions, 51 deletions
diff --git a/src/soc/intel/common/vbt.c b/src/soc/intel/common/vbt.c
deleted file mode 100644
index 3aba7c7c5d..0000000000
--- a/src/soc/intel/common/vbt.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Google Inc.
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-#include <cbfs.h>
-#include <console/console.h>
-#include <fsp/util.h>
-#include <lib.h>
-#include <soc/intel/common/ramstage.h>
-#include <string.h>
-#include <vendorcode/google/chromeos/chromeos.h>
-
-/* Locate VBT and pass it to FSP GOP */
-void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params)
-{
- const optionrom_vbt_t *vbt_data;
- uint32_t vbt_len;
-
- /* Check boot mode - for S3 resume path VBT loading is not needed */
- if (s3_resume) {
- vbt_data = NULL;
- printk(BIOS_DEBUG, "S3 resume do not pass VBT to GOP\n");
- } else {
- if (developer_mode_enabled() || recovery_mode_enabled()) {
- /* Get VBT data */
- vbt_data = fsp_get_vbt(&vbt_len);
- if (vbt_data != NULL)
- printk(BIOS_DEBUG, "Passing VBT to GOP\n");
- else
- printk(BIOS_DEBUG, "VBT not found!\n");
- } else
- vbt_data = NULL;
- }
- params->GraphicsConfigPtr = (u32)vbt_data;
-}