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| author | Subrata Banik <subrata.banik@intel.com> | 2018-12-31 16:14:46 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-01-03 04:31:11 +0000 |
| commit | 12992f62c0391b2711f9f125e5f1123e08807836 (patch) | |
| tree | 4104629b470f74567f89c88c390af88a9b40cdba /src/soc/intel/common | |
| parent | 9d75e87428c24cbc753a3bc4090dabfe893414b6 (diff) | |
| download | coreboot-12992f62c0391b2711f9f125e5f1123e08807836.tar.xz | |
mb/google/dragonegg: Make WP_RO range align with winbond specification
This patch ensures to make memory protected range between
01C00000h - 01FFFFFFh as per winbond spi datasheet
https://www.winbond.com/resource-files/w25q256jv%20spi%20revb%2009202016.pdf
section 7.1.15
BUG=none
BRANCH=none
TEST=build and boot dragonegg.
Change-Id: Ife451233f60ef680088babbc824bfc5a17078cb9
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/30551
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
0 files changed, 0 insertions, 0 deletions