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author | Furquan Shaikh <furquan@chromium.org> | 2017-04-04 11:47:19 -0700 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2017-04-05 20:33:04 +0200 |
commit | 340908aecf01093d35aaf0b71c55ed65c3ebbeac (patch) | |
tree | 7d011dfbcc88e75c615b040a491ee1a979df844c /src/soc/intel/common | |
parent | dd63f5978e44cdbf71047beb2e2b85c524ff3614 (diff) | |
download | coreboot-340908aecf01093d35aaf0b71c55ed65c3ebbeac.tar.xz |
soc/intel/lpss: Provide common LPSS clock config
Since there are multiple controllers in the LPSS and all use the same
frequency, provide a single Kconfig option for LPSS_CLOCK_MHZ.
BUG=b:35583330
Change-Id: I3c0cb62d56916e6e5f671fb5f40210f4cb33316f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19115
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r-- | src/soc/intel/common/Kconfig | 15 | ||||
-rw-r--r-- | src/soc/intel/common/lpss_i2c.c | 2 | ||||
-rw-r--r-- | src/soc/intel/common/lpss_i2c.h | 2 |
3 files changed, 9 insertions, 10 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index 3d2ced95d6..919cb50406 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -67,6 +67,13 @@ config ACPI_CONSOLE help Provide a mechanism for serial console based ACPI debug. +config SOC_INTEL_COMMON_LPSS_CLOCK_MHZ + int + help + The clock speed that the controllers in LPSS(GSPI, I2C) are running + at, in MHz. No default is set here as this is an SOC-specific value + and must be provided by the SOC. + config SOC_INTEL_COMMON_LPSS_I2C bool default n @@ -74,14 +81,6 @@ config SOC_INTEL_COMMON_LPSS_I2C This driver supports the Intel Low Power Subsystem (LPSS) I2C controllers that are based on Synopsys DesignWare IP. -config SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ - int - depends on SOC_INTEL_COMMON_LPSS_I2C - help - The clock speed that the I2C controller is running at, in MHz. - No default is set here as this is an SOC-specific value and must - be provided by the SOC when it selects this driver. - config SOC_INTEL_COMMON_LPSS_I2C_DEBUG bool "Enable debug output for LPSS I2C transactions" default n diff --git a/src/soc/intel/common/lpss_i2c.c b/src/soc/intel/common/lpss_i2c.c index 19fda4c703..b61c24afd7 100644 --- a/src/soc/intel/common/lpss_i2c.c +++ b/src/soc/intel/common/lpss_i2c.c @@ -611,7 +611,7 @@ static int lpss_i2c_gen_speed_config(struct lpss_i2c_regs *regs, const struct lpss_i2c_bus_config *bcfg, struct lpss_i2c_speed_config *config) { - const int ic_clk = CONFIG_SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ; + const int ic_clk = CONFIG_SOC_INTEL_COMMON_LPSS_CLOCK_MHZ; uint16_t hcnt_min, lcnt_min; int i; diff --git a/src/soc/intel/common/lpss_i2c.h b/src/soc/intel/common/lpss_i2c.h index b9517701f6..b46e657fd6 100644 --- a/src/soc/intel/common/lpss_i2c.h +++ b/src/soc/intel/common/lpss_i2c.h @@ -21,7 +21,7 @@ /* * Timing values are in units of clock period, with the clock speed - * provided by the SOC in CONFIG_SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ. + * provided by the SOC in CONFIG_SOC_INTEL_COMMON_LPSS_CLOCK_MHZ. * Automatic configuration is done based on requested speed, but the * values may need tuned depending on the board and the number of * devices present on the bus. |