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authorMaxim Polyakov <max.senia.poliak@gmail.com>2019-07-19 19:30:14 +0300
committerPatrick Georgi <pgeorgi@google.com>2019-08-21 09:31:44 +0000
commit8981c809e898617be48aaee05920f20fe983d2b2 (patch)
treecba408e66517d0c5842cf8beda6960d3b7cc9c10 /src/soc/intel/common
parentcb3e16f287938b2d2c2a7b4702045f5704f50365 (diff)
downloadcoreboot-8981c809e898617be48aaee05920f20fe983d2b2.tar.xz
soc/intel/common: gpio_defs: set trig to disable in PAD_NC
There is no need to change the default value for the RX Level/Edge Configuration parameter if the pad is not used/connected (PAD_NC) Change-Id: Ie7eee83fba9320d52240166371fe0c757dbdce49 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34843 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/gpio_defs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
index 744095207d..0c52f7d642 100644
--- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
+++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
@@ -289,11 +289,11 @@
/*
* No Connect configuration for unused pad.
* Both TX and RX are disabled. RX disabling is done to avoid unnecessary
- * setting of GPI_STS.
+ * setting of GPI_STS. RX Level/Edge Trig Configuration set to disable
*/
#define PAD_NC(pad, pull) \
_PAD_CFG_STRUCT(pad, \
- PAD_FUNC(GPIO) | PAD_RESET(DEEP) | \
+ PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_CFG0_TRIG_OFF | \
PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE, \
PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE))