diff options
author | Julius Werner <jwerner@chromium.org> | 2019-11-13 19:50:33 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-18 22:47:13 +0000 |
commit | a2148377b5605e96860476bd7cffbabc6e92542e (patch) | |
tree | 7cd07d20d3283bb141f85ef66b6b86ade1e6ee26 /src/soc/intel/common | |
parent | 85b41445b5c4df5833eceb7e1602408dc6c68662 (diff) | |
download | coreboot-a2148377b5605e96860476bd7cffbabc6e92542e.tar.xz |
include: Make stdbool.h a separate file
This patch moves the traditional POSIX stdbool.h definitions out from
stdint.h into their own file. This helps for using these definitions in
commonlib code which may be compiled in different environments. For
coreboot everything should chain-include this stuff via types.h anyway
so nothing should change.
Change-Id: Ic8d52be80b64d8e9564f3aee8975cb25e4c187f5
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36837
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cpulib.h | 3 | ||||
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/fast_spi.h | 3 | ||||
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/pcr.h | 2 |
3 files changed, 3 insertions, 5 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index a422094b26..84e750e2af 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -17,8 +17,7 @@ #ifndef SOC_INTEL_COMMON_BLOCK_CPULIB_H #define SOC_INTEL_COMMON_BLOCK_CPULIB_H -#include <stdint.h> -#include <stddef.h> +#include <types.h> /* * Set PERF_CTL MSR (0x199) P_Req with diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h index 6499ca5f5c..e0e664931b 100644 --- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h +++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h @@ -16,8 +16,7 @@ #ifndef SOC_INTEL_COMMON_BLOCK_FAST_SPI_H #define SOC_INTEL_COMMON_BLOCK_FAST_SPI_H -#include <stdint.h> -#include <stddef.h> +#include <types.h> /* * Disable the BIOS write protect and Enable Prefetching and Caching. diff --git a/src/soc/intel/common/block/include/intelblocks/pcr.h b/src/soc/intel/common/block/include/intelblocks/pcr.h index c3af2fddc3..c6554a36e5 100644 --- a/src/soc/intel/common/block/include/intelblocks/pcr.h +++ b/src/soc/intel/common/block/include/intelblocks/pcr.h @@ -20,7 +20,7 @@ #define PCR_PORTID_SHIFT 16 #if !defined(__ACPI__) -#include <stdint.h> +#include <types.h> uint32_t pcr_read32(uint8_t pid, uint16_t offset); uint16_t pcr_read16(uint8_t pid, uint16_t offset); |