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| author | Aamir Bohra <aamir.bohra@intel.com> | 2019-07-26 10:38:17 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-07-31 09:10:40 +0000 |
| commit | cac5e9472622f43c0b33d70f20adef801b345773 (patch) | |
| tree | 124e55c93fca9601c3d80cfb78269a24b61fed4c /src/soc/intel/common | |
| parent | 28883db36f21cdf7cf1b83737d37484057d8d10c (diff) | |
| download | coreboot-cac5e9472622f43c0b33d70f20adef801b345773.tar.xz | |
soc/intel/common/block/lpss: Correct the PCI device reference
The initial implementation was assigning the devfn as PCI device
reference directly which was incorrect.
Change-Id: Iad57e9bc6b2acf1823ee38116aea8a93feece6f9
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34579
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/lpss/lpss.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/lpss/lpss.c b/src/soc/intel/common/block/lpss/lpss.c index 226b4d30a8..a519bf65e2 100644 --- a/src/soc/intel/common/block/lpss/lpss.c +++ b/src/soc/intel/common/block/lpss/lpss.c @@ -14,6 +14,7 @@ */ #include <device/mmio.h> +#include <device/pci_def.h> #include <device/pci_ops.h> #include <intelblocks/lpss.h> @@ -80,7 +81,8 @@ void lpss_clk_update(uintptr_t base, uint32_t clk_m_val, uint32_t clk_n_val) void lpss_set_power_state(const struct device *dev, enum lpss_pwr_state state) { #if defined(__SIMPLE_DEVICE__) - pci_devfn_t lpss_dev = dev->path.pci.devfn; + unsigned int devfn = dev->path.pci.devfn; + pci_devfn_t lpss_dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); #else const struct device *lpss_dev = dev; #endif |