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authorShaunak Saha <shaunak.saha@intel.com>2016-08-22 22:05:35 -0700
committerAaron Durbin <adurbin@chromium.org>2016-08-25 23:43:58 +0200
commitde9fed4c2a6014b25042899e199cfe9a6115b52e (patch)
tree064c53fc88eeba35b58c7405492b6391ab477aaa /src/soc/intel/common
parentd6bb5495f94a6675b30e21d80c1c09559b2309ab (diff)
downloadcoreboot-de9fed4c2a6014b25042899e199cfe9a6115b52e.tar.xz
intel/common: Clear wake status bits before sleep
Call power management utility function clear_wake_sts from southbridge_smi_sleep before going to sleep. This is needed to clear the wake status bits in ACPI registers GPE0. BUG=chrome-os-partner:55583 BRANCH=None TEST=Verified that system goes to sleep on lidclose and powerd_dbus_suspend command issued from built-in keyboard. Change-Id: I204a59f8a19137d6a192ea2d89939eefcd5d41ce Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/16299 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/smihandler.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/common/smihandler.c b/src/soc/intel/common/smihandler.c
index e27752b48d..95e7c7639a 100644
--- a/src/soc/intel/common/smihandler.c
+++ b/src/soc/intel/common/smihandler.c
@@ -176,7 +176,9 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops)
printk(BIOS_DEBUG, "SMI#: ERROR: SLP_TYP reserved\n");
break;
}
- /* Clear pending wake status bit to avoid immediate wake */
+
+ /* Clear the gpio gpe0 status bits in ACPI registers */
+ clear_gpi_gpe_sts();
/* Tri-state specific GPIOS to avoid leakage during S3/S5 */