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authorBarnali Sarkar <barnali.sarkar@intel.com>2017-02-21 16:24:49 +0530
committerMartin Roth <martinroth@google.com>2017-03-01 16:32:21 +0100
commite13b77564f71dd125f2e4691407ac39efe552b6e (patch)
tree6d6e53f9294f39375747b60c196bea71095cfc18 /src/soc/intel/common
parent9e54978f6ef7c12d6da07f64ad665c0e47deba50 (diff)
downloadcoreboot-e13b77564f71dd125f2e4691407ac39efe552b6e.tar.xz
soc/intel/common: Save Memory DIMM Information in SMBIOS table
Save SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM. Add function dimm_info_fill() which populates SMBIOS memory information from FSP MEM_INFO_DATA_HOB data. BUG=chrome-os-partner:61729 BRANCH=none TEST=Build and boot KBLRVP to verify the type 17 DIMM info coming in SMBIOS table from Kernel command "dmidecode". Change-Id: I0fd7c9887076d3fdd320fcbdcc873cb1965b950c Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/18418 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/Makefile.inc1
-rw-r--r--src/soc/intel/common/smbios.c53
-rw-r--r--src/soc/intel/common/smbios.h27
3 files changed, 81 insertions, 0 deletions
diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc
index d6e1e751d6..25e51cd70b 100644
--- a/src/soc/intel/common/Makefile.inc
+++ b/src/soc/intel/common/Makefile.inc
@@ -13,6 +13,7 @@ romstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c
romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
romstage-y += util.c
romstage-$(CONFIG_MMA) += mma.c
+romstage-y += smbios.c
postcar-y += util.c
postcar-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
diff --git a/src/soc/intel/common/smbios.c b/src/soc/intel/common/smbios.c
new file mode 100644
index 0000000000..3aee9ff424
--- /dev/null
+++ b/src/soc/intel/common/smbios.c
@@ -0,0 +1,53 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <smbios.h>
+#include "smbios.h"
+#include <string.h>
+#include <console/console.h>
+
+/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
+void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
+ u32 frequency, u8 channel_id, u8 dimm_id, const char *module_part_num,
+ u16 data_width)
+{
+ dimm->dimm_size = dimm_capacity;
+ dimm->ddr_type = ddr_type;
+ dimm->ddr_frequency = frequency;
+ dimm->channel_num = channel_id;
+ dimm->dimm_num = dimm_id;
+ strncpy((char *)dimm->module_part_number,
+ module_part_num,
+ sizeof(dimm->module_part_number));
+ switch (data_width) {
+ case 8:
+ dimm->bus_width = MEMORY_BUS_WIDTH_8;
+ break;
+ case 16:
+ dimm->bus_width = MEMORY_BUS_WIDTH_16;
+ break;
+ case 32:
+ dimm->bus_width = MEMORY_BUS_WIDTH_32;
+ break;
+ case 64:
+ dimm->bus_width = MEMORY_BUS_WIDTH_64;
+ break;
+ case 128:
+ dimm->bus_width = MEMORY_BUS_WIDTH_128;
+ break;
+ default:
+ printk(BIOS_ERR, "Incorrect DIMM Data width");
+ }
+}
diff --git a/src/soc/intel/common/smbios.h b/src/soc/intel/common/smbios.h
new file mode 100644
index 0000000000..d38d6128c8
--- /dev/null
+++ b/src/soc/intel/common/smbios.h
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _COMMON_SMBIOS_H_
+#define _COMMON_SMBIOS_H_
+
+#include <stdint.h>
+#include <memory_info.h>
+
+/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
+void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
+ u32 frequency, u8 channel_id, u8 dimm_id, const char *module_part_num,
+ u16 data_width);
+
+#endif /* _COMMON_SMBIOS_H_ */