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author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2020-02-19 14:41:36 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-02 11:38:18 +0000 |
commit | 24a974a8cbbbf0009cbbec3f5dc11aa8e35c26a8 (patch) | |
tree | e9d49747b44ca0a9ceb2b2cf31a9bea6e9c3df4e /src/soc/intel/common | |
parent | c2a2d2ba268561fe0d4f076702a77071d6d6b57a (diff) | |
download | coreboot-24a974a8cbbbf0009cbbec3f5dc11aa8e35c26a8.tar.xz |
soc/intel/{common, skl, cnl, apl}: Move print_me_fw_version() to CSE lib
Move print_me_fw_version(), remove print_me_version/dump_me_version from
cnl/skl/apl and make changes to call print_me_version() which is defined
in the CSE lib.
TEST=Verified on hatch, soraka and bobba.
Change-Id: I7567fac100b14dc207b7fc6060e7a064fb05caf6
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39010
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r-- | src/soc/intel/common/block/cse/cse.c | 61 | ||||
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cse.h | 9 |
2 files changed, 70 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index b24a99a7f3..c9712dbb2c 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -754,6 +754,67 @@ int cse_hmrfpo_get_status(void) return resp.status; } +void print_me_fw_version(void *unused) +{ + struct version { + uint16_t minor; + uint16_t major; + uint16_t build; + uint16_t hotfix; + } __packed; + + struct fw_ver_resp { + struct mkhi_hdr hdr; + struct version code; + struct version rec; + struct version fitc; + } __packed; + + const struct mkhi_hdr fw_ver_msg = { + .group_id = MKHI_GROUP_ID_GEN, + .command = MKHI_GEN_GET_FW_VERSION, + }; + + struct fw_ver_resp resp; + size_t resp_size = sizeof(resp); + + /* Ignore if UART debugging is disabled */ + if (!CONFIG(CONSOLE_SERIAL)) + return; + + /* + * Ignore if ME Firmware SKU type is custom since + * print_boot_partition_info() logs RO(BP1) and RW(BP2) versions. + */ + if (cse_is_hfs3_fw_sku_custom()) + return; + + /* + * Prerequisites: + * 1) HFSTS1 Current Working State is Normal + * 2) HFSTS1 Current Operation Mode is Normal + * 3) It's after DRAM INIT DONE message (taken care of by calling it + * during ramstage + */ + if (!cse_is_hfs1_cws_normal() || !cse_is_hfs1_com_normal()) + goto fail; + + heci_reset(); + + if (!heci_send_receive(&fw_ver_msg, sizeof(fw_ver_msg), &resp, &resp_size)) + goto fail; + + if (resp.hdr.result) + goto fail; + + printk(BIOS_DEBUG, "ME: Version: %d.%d.%d.%d\n", resp.code.major, + resp.code.minor, resp.code.hotfix, resp.code.build); + return; + +fail: + printk(BIOS_DEBUG, "ME: Version: Unavailable\n"); +} + #if ENV_RAMSTAGE static void update_sec_bar(struct device *dev) diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 2b07092307..93d1ce1d04 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -22,6 +22,7 @@ /* MKHI Command groups */ #define MKHI_GROUP_ID_CBM 0x0 #define MKHI_GROUP_ID_HMRFPO 0x5 +#define MKHI_GROUP_ID_GEN 0xff /* Global Reset Command ID */ #define MKHI_CBM_GLOBAL_RESET_REQ 0xb @@ -33,6 +34,9 @@ #define MKHI_HMRFPO_ENABLE 0x1 #define MKHI_HMRFPO_GET_STATUS 0x3 +/* Get Firmware Version Command Id */ +#define MKHI_GEN_GET_FW_VERSION 0x2 + /* ME Current Working States */ #define ME_HFS1_CWS_NORMAL 0x5 @@ -164,6 +168,11 @@ int cse_hmrfpo_get_status(void); #define MKHI_HMRFPO_ENABLED 2 /* + * Queries and logs ME firmware version + */ +void print_me_fw_version(void *unused); + +/* * Checks current working operation state is normal or not. * Returns true if CSE's current working state is normal, otherwise false. */ |