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authorSubrata Banik <subrata.banik@intel.com>2018-12-19 18:02:17 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-03-24 04:01:11 +0000
commitcf32fd172928467ac5bbd4fb372b71230c81cf12 (patch)
tree9680154700a8d442e9f41d271ac208a6e28ecedf /src/soc/intel/common
parent10f5ccf9cb26e58aaaf7d77813bf43b235eea4af (diff)
downloadcoreboot-cf32fd172928467ac5bbd4fb372b71230c81cf12.tar.xz
soc/intel/common: Remove common chip config use_fsp_mp_init
This patch ensures to make use of common MP Init Kconfig to choose desire method to peform MP initialization for platform. Change-Id: I4ee51276026748e8daf154f89e57095e8fe50280 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/chip/chip.c15
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c4
-rw-r--r--src/soc/intel/common/block/include/intelblocks/chip.h15
3 files changed, 2 insertions, 32 deletions
diff --git a/src/soc/intel/common/block/chip/chip.c b/src/soc/intel/common/block/chip/chip.c
index 3dae6214ff..eed1ada0e8 100644
--- a/src/soc/intel/common/block/chip/chip.c
+++ b/src/soc/intel/common/block/chip/chip.c
@@ -32,18 +32,3 @@ const struct soc_intel_common_config *chip_get_common_soc_structure(void)
return soc_config;
}
-
-/*
- * This function will get MP Init config
- *
- * Return values:
- * 0 = Make use of coreboot MP Init
- * 1 = Make use of FSP MP Init
- */
-int chip_get_fsp_mp_init(void)
-{
- const struct soc_intel_common_config *common_config;
- common_config = chip_get_common_soc_structure();
-
- return common_config->use_fsp_mp_init;
-}
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 48bc496dbc..342a1203e4 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -133,7 +133,7 @@ static void init_cpus(void *unused)
struct device *dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);
assert(dev != NULL);
- if (chip_get_fsp_mp_init())
+ if (CONFIG(USE_INTEL_FSP_MP_INIT))
return;
microcode_patch = intel_microcode_find();
@@ -151,7 +151,7 @@ static void wrapper_x86_setup_mtrrs(void *unused)
/* Ensure to re-program all MTRRs based on DRAM resource settings */
static void post_cpus_init(void *unused)
{
- if (chip_get_fsp_mp_init())
+ if (CONFIG(USE_INTEL_FSP_MP_INIT))
return;
if (mp_run_on_all_cpus(&wrapper_x86_setup_mtrrs, NULL, 1000) < 0)
diff --git a/src/soc/intel/common/block/include/intelblocks/chip.h b/src/soc/intel/common/block/include/intelblocks/chip.h
index d761f6be76..555bdaa893 100644
--- a/src/soc/intel/common/block/include/intelblocks/chip.h
+++ b/src/soc/intel/common/block/include/intelblocks/chip.h
@@ -33,24 +33,9 @@ struct soc_intel_common_config {
int chipset_lockdown;
struct gspi_cfg gspi[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX];
struct dw_i2c_bus_config i2c[CONFIG_SOC_INTEL_I2C_DEV_MAX];
- /*
- * Option for mainboard to skip coreboot MP initialization
- * 0 = Make use of coreboot MP Init
- * 1 = Make use of FSP MP Init
- */
- uint8_t use_fsp_mp_init;
};
/* This function to retrieve soc config structure required by common code */
const struct soc_intel_common_config *chip_get_common_soc_structure(void);
-/*
- * This function will get MP Init config
- *
- * Return values:
- * 0 = Make use of coreboot MP Init
- * 1 = Make use of FSP MP Init
- */
-int chip_get_fsp_mp_init(void);
-
#endif /* SOC_INTEL_COMMON_BLOCK_CHIP_H */