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author | Subrata Banik <subrata.banik@intel.com> | 2018-11-19 16:23:01 +0530 |
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committer | Nico Huber <nico.h@gmx.de> | 2018-11-19 19:42:06 +0000 |
commit | 87ca3898f90a24c92e8dffb70d617049b05d190c (patch) | |
tree | b6c24cd4fd00a5417cac186ccfb58df214482fd9 /src/soc/intel/denverton_ns/Kconfig | |
parent | c1fa44091e95451c592ac6f3852cf71cc490f429 (diff) | |
download | coreboot-87ca3898f90a24c92e8dffb70d617049b05d190c.tar.xz |
soc/intel/{common, skylake}: Make ASPM enabling as common PCH feature
This patch moves required Kconfig selection for enabling ASPM feature
(like clk_pm, L1 state etc) from soc code to intel common pch base code.
TEST=Run lspci -vvv | grep ASPM
The output shows the ASPM L1 is enable for pci devices
Change-Id: Ic77602a75f0c9ccf28ebfd57e53433dc90985a16
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/29653
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/denverton_ns/Kconfig')
0 files changed, 0 insertions, 0 deletions