soc/intel/denverton_ns: Add support for Intel Atom C3000 SoC

This change adds support for Intel Atom C3000 SoC
("Denverton" and "Denverton-NS").
Code is partially based on Apollo Lake/Skylake code.

Change-Id: I53d69aede3b92f1fe06b74a96cc40187fb9825f1
Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com>
Reviewed-on: https://review.coreboot.org/20861
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>

1 files changed, 24 insertions, 0 deletions

diff --git a/src/soc/intel/denverton_ns/acpi/sata2.asl b/src/soc/intel/denverton_ns/acpi/sata2.asl
new file mode 100644
index 0000000000..46be4e4db2
--- /dev/null
+++ b/src/soc/intel/denverton_ns/acpi/sata2.asl
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 - 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+// Intel SATA Controller 0:14.0
+
+Device (SAT2)
+{
+	Name (_ADR, 0x00140000)
+
+	/* TODO */
+}