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author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2018-02-12 12:24:25 +0100 |
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committer | Martin Roth <martinroth@google.com> | 2018-02-20 23:17:39 +0000 |
commit | 5268b76801280667d8c27619fe2d771569c4e346 (patch) | |
tree | 075fa6b949b6719450755cdcdec912936a6754c2 /src/soc/intel/denverton_ns/csme_ie_kt.c | |
parent | e33f120cb808b946f3052019c9e4cf54b086491a (diff) | |
download | coreboot-5268b76801280667d8c27619fe2d771569c4e346.tar.xz |
src/soc: Fix various typos
These typos were found through manual review and grep.
Change-Id: I6693a9e3b51256b91342881a7116587f68ee96e6
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/23706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/soc/intel/denverton_ns/csme_ie_kt.c')
-rw-r--r-- | src/soc/intel/denverton_ns/csme_ie_kt.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/denverton_ns/csme_ie_kt.c b/src/soc/intel/denverton_ns/csme_ie_kt.c index 78488835a2..7de0976854 100644 --- a/src/soc/intel/denverton_ns/csme_ie_kt.c +++ b/src/soc/intel/denverton_ns/csme_ie_kt.c @@ -38,7 +38,7 @@ static void pci_read_bases(struct device *dev, unsigned int howmany) struct resource *resource; resource = pci_get_resource(dev, index); /** - * Workarond for Denverton-NS silicon (Rev A0/A1 for CSME/IE, + * Workaround for Denverton-NS silicon (Rev A0/A1 for CSME/IE, * Rev B0 for CSME only) * CSME&IEs KT IO bar must be 16-byte aligned */ @@ -59,7 +59,7 @@ static void pci_read_bases(struct device *dev, unsigned int howmany) static void pci_csme_ie_kt_read_resources(device_t dev) { /** - * CSME/IE KT has 2 BARs to chec: + * CSME/IE KT has 2 BARs to check: * 0x10 - KT IO BAR * 0x14 - KT Memory BAR * CSME/IE KT has no Expansion ROM BAR to check: |