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authorElyes HAOUAS <ehaouas@noos.fr>2020-05-07 07:26:54 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-08 15:20:28 +0000
commite4fc65bf746fe79babd03ce4d8efc54219b471b4 (patch)
tree876333f0b5adecfc4bcb6ba49704d55c75809e72 /src/soc/intel/denverton_ns/include/soc/romstage.h
parent132384aa4c71b5e8443834d872af89cfbff89376 (diff)
downloadcoreboot-e4fc65bf746fe79babd03ce4d8efc54219b471b4.tar.xz
soc/intel: Replace GPLv2 long form headers with SPDX header
Change-Id: I468d2ba85033c41ba53333ebbfd6f4108a36e407 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41130 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/denverton_ns/include/soc/romstage.h')
-rw-r--r--src/soc/intel/denverton_ns/include/soc/romstage.h14
1 files changed, 1 insertions, 13 deletions
diff --git a/src/soc/intel/denverton_ns/include/soc/romstage.h b/src/soc/intel/denverton_ns/include/soc/romstage.h
index 66f86ee0cc..4b1a1e5bbb 100644
--- a/src/soc/intel/denverton_ns/include/soc/romstage.h
+++ b/src/soc/intel/denverton_ns/include/soc/romstage.h
@@ -1,17 +1,5 @@
/* This file is part of the coreboot project. */
-/*
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
+/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef _SOC_DENVERTON_NS_ROMSTAGE_H_
#define _SOC_DENVERTON_NS_ROMSTAGE_H_