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author | Julien Viard de Galbert <jviarddegalbert@online.net> | 2018-08-14 16:15:26 +0200 |
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committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-09-14 14:11:03 +0000 |
commit | 2912e8e5dc66708703db79df87e3215408a653ae (patch) | |
tree | ce3fd68f9114c4654957e4810f273625a148442f /src/soc/intel/denverton_ns/pmutil.c | |
parent | 86b8d176e8b2d62c1d4a713f91b5858b5d39dd84 (diff) | |
download | coreboot-2912e8e5dc66708703db79df87e3215408a653ae.tar.xz |
soc/intel/denverton_ns: Enable common block PMC
Mainly update headers to build.
Added option PMC_GLOBAL_RESET_ENABLE_LOCK to remove
function configuring the global reset through PMC base.
On denverton the global reset lock is not in PMC base
but in the PCI registers so this code cannot be shared.
Change-Id: I9ace70862cab63f8355252d034292596c7eab1fd
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/25426
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Evandro Luiz Hauenstein <kingsumos@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/soc/intel/denverton_ns/pmutil.c')
-rw-r--r-- | src/soc/intel/denverton_ns/pmutil.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/denverton_ns/pmutil.c b/src/soc/intel/denverton_ns/pmutil.c index 78903bbc35..ccf0d9586b 100644 --- a/src/soc/intel/denverton_ns/pmutil.c +++ b/src/soc/intel/denverton_ns/pmutil.c @@ -189,17 +189,17 @@ uint32_t clear_tco_status(void) { return print_tco_status(reset_tco_status()); } void enable_gpe(uint32_t mask) { uint16_t pmbase = get_pmbase(); - uint32_t gpe0_en = inl((uint16_t)(pmbase + GPE0_EN)); + uint32_t gpe0_en = inl((uint16_t)(pmbase + GPE0_EN(GPE_STD))); gpe0_en |= mask; - outl(gpe0_en, (uint16_t)(pmbase + GPE0_EN)); + outl(gpe0_en, (uint16_t)(pmbase + GPE0_EN(GPE_STD))); } void disable_gpe(uint32_t mask) { uint16_t pmbase = get_pmbase(); - uint32_t gpe0_en = inl((uint16_t)(pmbase + GPE0_EN)); + uint32_t gpe0_en = inl((uint16_t)(pmbase + GPE0_EN(GPE_STD))); gpe0_en &= ~mask; - outl(gpe0_en, (uint16_t)(pmbase + GPE0_EN)); + outl(gpe0_en, (uint16_t)(pmbase + GPE0_EN(GPE_STD))); } void disable_all_gpe(void) { disable_gpe(~0); } @@ -207,8 +207,8 @@ void disable_all_gpe(void) { disable_gpe(~0); } static uint32_t reset_gpe_status(void) { uint16_t pmbase = get_pmbase(); - uint32_t gpe_sts = inl((uint16_t)(pmbase + GPE0_STS)); - outl(gpe_sts, (uint16_t)(pmbase + GPE0_STS)); + uint32_t gpe_sts = inl((uint16_t)(pmbase + GPE0_STS(GPE_STD))); + outl(gpe_sts, (uint16_t)(pmbase + GPE0_STS(GPE_STD))); return gpe_sts; } |