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authorJohanna Schander <coreboot@mimoja.de>2019-12-08 15:54:09 +0100
committerNico Huber <nico.h@gmx.de>2020-03-30 10:53:51 +0000
commit8a6e036861c87deadc6455f89062c56639acbdc7 (patch)
tree6a002f54f20d79107298a581c22216a20f3f3a7d /src/soc/intel/denverton_ns
parente5565c45cb71df105bc9ff1dc7572b4e749adaea (diff)
downloadcoreboot-8a6e036861c87deadc6455f89062c56639acbdc7.tar.xz
intel/fsp2_0: Make FSP_USE_REPO a SoC opt-in
For quite a bit now we are extending the FSP_USE_REPO option to be available for all Intel SoCs. This results in a list being not only hard to maintain but also prone to errors. To change that behaviour this commit introduces the HAVE_INTEL_FSP_REPO config option for SoCs that are supported from within 3rdparty/fsp. If a SoC selects HAVE_INTEL_FSP_REPO the config option FSP_USE_REPO is selected by default, but can be still deselected by the user in menuconfig. Change-Id: I68ae373ce591f06073064aa75aac32ceca8fa1cc Signed-off-by: Johanna Schander <coreboot@mimoja.de> Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37582 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/denverton_ns')
-rw-r--r--src/soc/intel/denverton_ns/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 6ca7f3e61f..c628dbd7b5 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -32,6 +32,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_RESET
select PLATFORM_USES_FSP2_0
select IOAPIC
+ select HAVE_INTEL_FSP_REPO
select HAVE_SMI_HANDLER
select CACHE_MRC_SETTINGS
select PARALLEL_MP