diff options
| author | Felix Singer <felixsinger@posteo.net> | 2020-03-03 22:39:02 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-04 21:51:04 +0000 |
| commit | e0b74a142c34c9eebbdfd3d96dc8b9076f8c7740 (patch) | |
| tree | 4e54bbe71b0f30c6098da64216bd5ad20218f961 /src/soc/intel/denverton_ns | |
| parent | 6a8cde4927bd6bff60a783c72356fcce801511b8 (diff) | |
| download | coreboot-e0b74a142c34c9eebbdfd3d96dc8b9076f8c7740.tar.xz | |
soc/intel/denverton_ns: Allow including microcode
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: Iaa295c74e9c470d5830e22d0b0c73013c7333293
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39266
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/denverton_ns')
| -rw-r--r-- | src/soc/intel/denverton_ns/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/denverton_ns/Makefile.inc | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index a74250bab3..23b84529d2 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -53,6 +53,7 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select UDK_2015_BINDING select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select SUPPORT_CPU_UCODE_IN_CBFS config MMCONF_BASE_ADDRESS hex diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index 7529892dcc..635dab8908 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -92,4 +92,6 @@ $(call strip_quotes,$(CONFIG_FSP_T_CBFS))-options := -b $(CONFIG_FSP_T_ADDR) --x $(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) --xip $(call strip_quotes,$(CONFIG_FSP_S_CBFS))-options := -b $(CONFIG_FSP_S_ADDR) --xip +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5f-01 + endif ## CONFIG_SOC_INTEL_DENVERTON_NS |