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authorFelix Held <felix-coreboot@felixheld.de>2020-09-11 15:54:30 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-09-12 15:00:07 +0000
commit4b58d14fa7f20e037e58ef11850784aa97a1cd96 (patch)
tree8a49cc83fa36b8f7d95ad0c2a4400a4c84661f24 /src/soc/intel/denverton_ns
parente3a1247b15e756f01d9c25bc71fa2cf563de34a8 (diff)
downloadcoreboot-4b58d14fa7f20e037e58ef11850784aa97a1cd96.tar.xz
soc/intel/denverton_ns/uart_debug: include header for uart_platform_base
Include console/uart.h for the declaration of uart_platform_base instead of declaring the function in the source file. Change-Id: Ib72d8884f27e93cec058dbcda404dd6908de1981 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45295 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/denverton_ns')
-rw-r--r--src/soc/intel/denverton_ns/uart_debug.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/denverton_ns/uart_debug.c b/src/soc/intel/denverton_ns/uart_debug.c
index acd1f038c3..7f804c7e8e 100644
--- a/src/soc/intel/denverton_ns/uart_debug.c
+++ b/src/soc/intel/denverton_ns/uart_debug.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <stdint.h>
+#include <console/uart.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <soc/uart.h>
@@ -8,8 +9,6 @@
#define MY_PCI_DEV(SEGBUS, DEV, FN) \
((((SEGBUS)&0xFFF) << 20) | (((DEV)&0x1F) << 15) | (((FN)&0x07) << 12))
-uintptr_t uart_platform_base(unsigned int idx);
-
uintptr_t uart_platform_base(unsigned int idx)
{
return (uintptr_t)pci_io_read_config32(