diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-12-22 12:28:07 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-01-27 22:48:06 +0100 |
| commit | f1e3c763b3eef15dbfae73f485408a0dec230d00 (patch) | |
| tree | 28682b0d4ad36063b3612c8a774af868a3e55878 /src/soc/intel/fsp_baytrail/Makefile.inc | |
| parent | 91fac61240612291f7be3362f7acad31803e8b03 (diff) | |
| download | coreboot-f1e3c763b3eef15dbfae73f485408a0dec230d00.tar.xz | |
CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM
The name was always obscure and confusing. Instead define cbmem_top()
directly in the chipset code for x86 like on ARMs.
TODO: Check TSEG alignment, it used for MTRR programming.
Change-Id: Ibbe5f05ab9c7d87d09caa673766cd17d192cd045
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7888
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/intel/fsp_baytrail/Makefile.inc')
| -rw-r--r-- | src/soc/intel/fsp_baytrail/Makefile.inc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc index fcbe6e7e9e..3896e851e7 100644 --- a/src/soc/intel/fsp_baytrail/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/Makefile.inc @@ -44,8 +44,6 @@ ramstage-y += ramstage.c ramstage-y += gpio.c romstage-y += gpio.c ramstage-y += pmutil.c -romstage-y += raminit.c -ramstage-y += raminit.c ramstage-y += southcluster.c romstage-y += reset.c ramstage-y += reset.c |